Page
31
Non-inverted - Cleared on upcount, set on downcount
Inverted - Set on upcount, cleared on downcount
Output Compare
The value of Timer 0 is compared with the value set in the
Compare Value
Field. When a match
is detected, the effect on the output pin (OC0 - pin 14) is set by the
Output
radio buttons.
If the Clear Timer box is checked, the timer is reset to $00 in the CPU clock cycle after a match.
The output can be configured as illustrated.
Timer 1 Window
Timer 1 is 16-bit and is far more complicated than Timer 0 and has many more operating modes.
Standard Operation
Regardless of which other options are selected, Timer 1 can operate in Timer or Counter mode If
Source
is set to Timer, Timer 1 increments from the system clock. If it is set to Counter, it
increments on either rising or falling edge (set by
Edge
) on T1 pin (pin31 - PD6).
A
prescaler
can be applied to increase overflow time in timer mode.
