JVC KD-MX2900R, Service Manual

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3. Pin function (1/3)
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I/O
O
O
O
O
I
O
I
I
I
O
O
I
O
O
O
-
I
-
I
O
-
-
O
-
-
O
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I
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O
O
I
O
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O
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O
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O
O
O
Digital ground.
Monitor input/output.
Monitor output.
Monitor output.
Monitor output.
MD:Phase comparison output for clock recovery analog PLL of playback EFM.
CD:Subcode Q 80 bits, PCM peak and level data output. CD-TEXT data output.
MD:Clock input from external VCO.
CD:PDO Pin data output clock input.
Interruption status output.
Microcomputer serial bus data write input.
Microcomputer serial bus clock input.
Microcomputer serial bus latch input.
Microcomputer serial bus data read output.
Outputs the internal status corresponding to the microcomputer serial bus address.
Reset input. Low:reset
Disc subcode Q sync/ADIP sync output.
CD:SCOR output of the crystal accuracy which absorbed the frame jitter margin
when SCR SEL = high.
Left channel mute flag. Active for zero data detection and D/A converter mute.
Digital power supply.
Test input. (Connect to the D/A converter power supply.)
Power supply for D/A converter.
Crystal oscillation circuit input.
Crystal oscillation circuit output.
GND for D/A converter.
GND for D/A converter.
Internal D/A converter left channel output.
Power supply for D/A converter.
Power supply for D/A converter.
Internal D/A converter right channel output.
GND for D/A converter.
Test input. (Connect to GND for D/A converter.)
Digital GND.
Right channel mute flag. Active for zero data detection and D/A converter mute.
Digital audio output. (16/20 bits selectable)
Input to the internal D/A converter. (Connect to GND when not used.)
Data output to the D/A converter. (16/18/20 bits selectable)
LR clock for the D/A converter. (44.1kHz)
Bit clock for the D/A converter. (2.8244MHz)
11.2896MHz clock output. (Crystal system)
Digital power supply.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output.
External DRAM address output. DVss
MNT0
MNT1
MNT2
MNT3
PDO
MVCI
XINT
SWDT
SCLK
XLAT
SRDT
SENS
ZRST
SQSY
GRSCOR
MUTFLG
DVDD
TST2
DAVDD1
OSCI
OSCO
DAVss1
DAVss2
AOUTL
DAVDD2
DAVDD3
AOUTR
DAVss3
TST1
DVss
MUTFLG
DOUT
DATAI
DADT
LRCK
XBCK
FS256
DVDD
A03
A02
A01
A00
A10
A04
A05
A06
A07
A08
A11
Pin
No.
Symbol I/O Function