JK microsystems Flashlite 186, User Manual

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Flashlite 186
User’s Manual
JK
microsystems
Hardware
Hardware
Memory Configuration
The R8822 processor is configured in real mode with a physical address space of 1 megabyte.
The DRAM is located between 00000h and 7FFFFh, the flash is between 80000h and FFFFFh. A
32-pin DIP socket is provided for additional flash, RAM, or EPROM. This memory can be
accessed by reprogramming the chip select unit.
During the boot process the BIOS is copied from flash into the top of RAM. The BIOS executes
out of RAM. After the BIOS is copied, the flash is removed from the memory map with the
exception of a 64k window starting at segment F000. This allows the reset procedures to work
properly while maintaining user access to peripherals mapped in the higher portion of memory.
When a request for data on drive A: or B: is processed, the flash is mapped in to the top 512k of
memory, the drive read, then mapped out again. If present, the DiskOnChip occupies an 64k
block of memory starting at segment E000 hex.
I/O Configuration
The R8822 internal peripherals (UARTs, counter/timers, and interrupt controller) are not PC
compatible or located at their traditional I/O port addresses.
For addressing and programming the peripherals specific to the R8822, please refer to the RDC
R8822 Microcontroller User’s Manual. The manual is available in PDF format on the
Development Kit CD or from our web site at http://www.jkmicro.com
Digital I/O Ports
The Flashlite has a total of 44 bits of I/O. 40 bits are generated by a CPLD and the remainder are
from the R8822 processor.
PIO0-1, 2 bits of I/O are controlled by the R8822 processor. These bits are individually
configurable as inputs or outputs.
PIO10-11, 2 bits of I/O are controlled by the R8822 processor. PIO10 is used as the software
serial receive line and PIO11 is used as the software serial transmit line.
The PIO bits 1 and 2 are defined as inputs upon powerup. To read their states, you must perform
a 16-bit input from the R8822 PDATA0 register and look at bits 0 and 1. The base address for all
R8822 internal registers is 0FFxxh, with PDATA0 at 0FF74h. To change the I/O’s to outputs, you
must clear the respective bit(s) in the R8822 PDIR0 register.
When changing any bit value in the R8822 PIO registers, it is essential that all of the
other bit values be preserved. You must read the 16-bit register, modify the desired bit(s),
and write the new value to the register.
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