JBL A6000GTi, Service Manual, Page: 13 / 62

137159-1 Rev. 1 A6000GTi Service Manual

2003 Crown Audio, Inc.
Theory Of Operations 3-2
3.1.2. Error Amplifier
The signal next enters the main amplifier error amp (U500-D) where it is mixed with a
small portion of the output volt
age and current in such a way as to control the amplifier’s
overall output performance. From the error amplifier, the signal is divided and fed to the
modulator. Since the modulator circuit is balanced, the drive signal for the positive
modulator is inverted by U500-A.
3.1.3. Modulator
U502 and U505 are high-speed differential comparators. U502 is the positive comparator
and U505 is the negative comparator. The comparator section has two outputs: inverting
and non-inverting. The output is therefore balanced. The audio signal is applied to the
inverting input of both differential comparators (with the positive modulator receiving the
audio out of phase from the negative modulator). The 125kHz triangle wave (described
below) is applied to the non-inverting input of both differential comparators. With no audio
signal, the bipolar triangle wave is therefore compared to a zero-volt signal and this results
in a 125kHz square wave pulse train that is passed to the NAND gate section of the
differential comparator.
The balanced output of U502 forms the positive portion of the output waveform (Vp). The
output of U505 is also balanced and forms the negative portion of the output waveform
(Vn). These two balanced signal lines are routed to the output stage drivers, U301 and
U302. If an audio signal is present at the inputs of the modulators, the triangle wave will
be compared to a varying signal at the comparators and the outputs of the NAND gates
will be a 125kHz pulse train in which the widths of the pulses vary with the audio
amplitude.
This operation is described as Pulse Width Modulation (PWM), as used in the BCA
amplifier.
3.1.4. Triangle Generator
The 125 kHz triangle wave has its origins from the 4MHz crystal oscillator (Y40). A seven-
stage counter (U49) is used as a divide by. The output Q3 is a divide by 8 (500kHz), Q4 is
a divide by 16 (250kHz) and Q5 is a divide by 32 (125kHz). The clock is then buffered by
the NAND gate (U47).
After U509-A divides the 250kHz square wave down to 125kHz, the square wave is sent
thru a parallel combination of hex inverters (U505-A thru
–F). Multiple inverters are
required to provide sufficient drive to the next stage. The transistors Q502
– Q509 form a
low noise discrete op amp. This circuit converts the signal from a 0V-5V square wave to a
–5V to +5V triangle wave that is extremely accurate. The triangle wave is finally routed to
the modulators.