̶
30
̶
SW-4000M-PMCL
■
When [Exposure Mode] is [Trigger Width]
•
Line Start Trigger On
PWC mode
Data Output
EEN
LVAL
Trigger
Next trigger start prohibited period
Next trigger input
allowed period
(Blanking)
F (Valid data period)
G (Line Period)
B
H
A
Trigger width + C[usec]~
CC1 3.0usec~, 12pin 500 nsec~
Trigger Width
D
[Binning Off]
Tap
Geometry
Bit/
Pixel
CL
Pixel
Clock
[MHz]
Delay time
From Trigger
to EEN rising
[A](usec)
Period From
EEN Falling
to LVAL rising
[B](usec)
EEN
invalid
time [C]
(usec)
Data
invalid
time [D]
(CLK)
Data
valid
time [F]
(CLK)
Line
Period
[G]
(CLK)
Delay time
From Trigger
falling to EEN
falling [H](usec)
1X2
8/10
31.70
1.5
13.4
-0.34
10
2048
2058
1.1
42.41
1.5
13.3
-0.34
17
2048
2065
1.1
63.39
1.5
13.2
-0.34
10
2048
2058
1.1
84.82
1.5
13.2
-0.34
18
2048
2066
1.1
1X3
8
31.70
1.5
13.4
-0.34
7
1364
1371
1.1
42.41
1.5
13.3
-0.34
12
1364
1376
1.1
63.39
1.5
13.2
-0.34
8
1364
1372
1.1
84.82
1.5
13.2
-0.34
12
1364
1376
1.1
1X4
8/10
31.70
1.5
13.4
-0.34
5
1024
1029
1.1
42.41
1.5
13.3
-0.34
9
1024
1033
1.1
63.39
1.5
13.2
-0.34
6
1024
1030
1.1
84.82
1.5
13.2
-0.34
10
1024
1034
1.1
1X8
8/10
31.70
1.5
13.4
-0.34
3
512
515
1.1
42.41
1.5
13.3
-0.34
5
512
517
1.1
63.39
1.5
13.2
-0.34
4
512
516
1.1
84.82
1.5
13.2
-0.34
6
512
518
1.1
1X10
8
31.70
1.5
13.4
-0.34
3
409
412
1.1
42.41
1.5
13.3
-0.34
4
409
413
1.1
63.39
1.5
13.2
-0.34
3
409
412
1.1
84.82
1.5
13.2
-0.34
52
409
461
1.1
