Rev 2.0
Page 20 of 164
Generic Qseven Carrier Board Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
57
GND9
Power
0V
Ground.
58
GND10
Power
0V
Ground.
59
HDA_SYNC/
I2S_WS
Input
3.3V CMOS
Audio Transmit frame synchronization
line.
60
SMB_CLK/
GP1_I2C_CLK
Input
3.3V CMOS
System Management Bus Clock.
61
HDA_RST#/
I2S_RST#
Input
3.3V CMOS
Audio reset.
62
SMB_DAT/
GP1_I2C_DAT
Input/Output
3.3V CMOS
System Management Bus Data.
63
HDA_BITCLK/
I2S_CLK
Input
3.3V CMOS
Audio Transmit Clock line.
64
SMB_ALERT#
Output
3.3V CMOS
System Management Bus Alert input.
Default NC.
Connected to 3
rd
Pin of SDVO Header
(J47) through resistor and default not
populated.
65
HDA_SDI/ I2S_SDI Output
3.3V CMOS
Audio Transmit data line.
66
GP0_I2C_CLK
Input
3.3V CMOS/
4.7K Pull-up
I2C Clock signal.
67
HDA_SDO/
I2S_SDO
Input
3.3V CMOS
Audio Receive data line.
68
GP0_I2C_DAT
Input/Output
3.3V CMOS/
4.7K Pull-up
I2C Data signal.
69
THRM#
Output
3.3V CMOS
Thermal Alarm active low signal.
Connected to 11
th
Pin of Qseven Control
Signal Header (J53).
70
WDTRIG#
Output
3.3V CMOS
Watchdog trigger signal.
Default NC.
Connected to 2
nd
Pin of Qseven Control
Signal Header (J53) through resistor and
default not populated.
71
THRMTRIP#
Input
3.3V CMOS
Thermal Trip indicates an overheating
condition of the Processor.
Connected to 12
th
Pin of Qseven Control
Signal Header (J53).
