iWave iW-RainboW-G27M, Hardware User'S Manual

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REL1.0
Page 30 of 71
i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
SMARC
Pin No. SMARC Edge
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
S6 MIPI_CSI0_MCLK_OUT MIPI_CSI0_MCLK
_OUT /BJ23
O, 1.8V CMOS Master Clock for Camera.
S7 MIPI_CSI0_I2C0_SDA MIPI_CSI0_I2C0
_SDA /BN19 IO, 1.8V CMOS/
2.2K PU MIPI CSI0 I2C Data.
S8 MIPI_CSI0_CLK_P MIPI_CSI0_CLK
_P /BF20 I, MIPI MIPI CSI0 differential Clock positive.
S9 MIPI_CSI0_CLK_N MIPI_CSI0_CLK
_N /BE21 I, MIPI MIPI CSI0 differential Clock negative.
S11 MIPI_CSI0_DATA0_P MIPI_CSI0_
DATA0_P/
BF22 I, MIPI MIPI CSI0 differential data lane 0
positive.
S12 MIPI_CSI0_DATA0_N MIPI_CSI0_DATA0
_N/BE23 I, MIPI MIPI CSI0 differential data lane 0
negative.
S14 MIPI_CSI0_DATA1_P MIPI_CSI0_DATA1
_P/BE19 I, MIPI MIPI CSI0 differential data lane 1
positive.
S15 MIPI_CSI0_DATA1_N MIPI_CSI0_DATA1
_N/BF18 I, MIPI MIPI CSI0 differential data lane 1
negative.
For more details on MIPI CSI0 signal connection on Expansion connector, refer below table:
Exp.
Pin No
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
80 MIPI_CSI0_DATA2_P MIPI_CSI0_DAT
A2_P/BF24 I, MIPI MIPI CSI0 differential data lane 2
positive.
82 MIPI_CSI0_DATA2_N MIPI_CSI0_DLN
2_M/BE25 I, MIPI MIPI CSI0 differential data lane 2
negative.
86 MIPI_CSI0_DATA3_P MIPI_CSI0_DLN
3_P/BF16 I, MIPI MIPI CS0 differential data lane 3
positive.
88 MIPI_CSI0_DATA3_N MIPI_CSI0_DLN
3_M/BE17 I, MIPI MIPI CSI0 differential data lane 3
negative.
For more details on MIPI CSI1 SMARC pinouts, refer below table:
SMARC
Pin No. SMARC Edge
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
S1 MIPI_CSI1_I2C0_SCL MIPI_CSI1_
I2C0_SCL/BN17 O, 1.8V CMOS/
2.2K PU MIPI CSI1 I2C Clock.
S2 MIPI_CSI1_I2C0_SDA MIPI_CSI1_
I2C0_SDA /BE15 IO, 1.8V CMOS/
2.2K PU MIPI CSI1 I2C Data.
P3 MIPI_CSI1_CLK_P MIPI_CSI1_
CLK_P/BJ17 I, MIPI MIPI CSI1 differential clock positive.
P4 MIPI_CSI1_CLK_N MIPI_CSI1_
CLK_N/BH16 I, MIPI MIPI CSI1 differential clock negative.
P7 MIPI_CSI1_DATA0_P MIPI_CSI1_
DATA0_P/BH18 I, MIPI MIPI CSI1 differential data lane 0
positive.
P8 MIPI_CSI1_DATA0_N MIPI_CSI1_
DATA0_N /BJ19 I, MIPI MIPI CSI1 differential data lane 0
negative.