iWave iW-RainboW-G27M, Hardware User'S Manual

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Page 28 of 71
i.MX8 SMARC SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Exp.
Pin No
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
8
USB3_HUB3_RXP NA
I, USB USB3.0 Hub Receive channel 3 Plus.
10 USB3_HUB3_RXM
NA
I, USB USB3.0 Hub Receive channel 3 Minus.
14 USB3_HUB4_TXP
NA
O, USB SS USB3.0 Hub Transmit channel 4 Plus.
16 USB3_HUB4_TXM
NA
O, USB SS USB3.0 Hub Transmit channel 4 Minus.
20 USB3_HUB4_RXP
NA
I, USB SS USB3.0 Hub Receive channel 4 Plus.
22 USB3_HUB4_RXM
NA
I, USB SS USB3.0 Hub Receive channel 4 Minus.
2.7.5 PCIe Interface
The i.MX8 CPU supports two Lane PCI Express -3.0 (PCIe gen3: 8GHz to get 8GHz baud clock) channels. In i.MX8 SMARC
SOM PCIe0 and PCIe1 lane are connected to PCIeA and PCIeB lanes of SMARC Edge connector respectively and as per
SMARC specification TX lines are AC coupled with 0.22uF capacitors. Also, 100MHz reference clock is provided for both
Channel A & Channel B from a single 100MHz Oscillator.
For more details on PCIe pinouts, refer below table:
SMARC
Pin No.
SMARC Edge
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
P75 PCIE_A_RST_B
(GPIO4_29) PCIE_CTRL0_
PERST_B/D20 O, 3.3V CMOS PCIe Channel-A Reset Out.
P77 PCIE_B_CKREQ_B NA I,3.3V CMOS NC.
Note: Optionally connected to
PCIE_B_CKREQ_B
P78 PCIE_A_CKREQ_B NA I,3.3V CMOS NC.
Note: Optionally connected to
PCIE_B_CKREQ_A
P83 PCIE_A_REFCLK_P NA O, PCIe PCIe Channel-A Clock Positive.
Note: From External Oscillator.
P84 PCIE_A_REFCLK_N NA O, PCIe PCIe Channel-A Clock Negative.
Note: From External Oscillator.
P86 PCIE0_A_RX0_P PCIE0_RX0_P/
A29 I, PCIe PCIe Channel-A Receive Positive.
P87 PCIE0_A_RX0_N PCIE0_RX0_N/
B30 I, PCIe PCIe Channel-A Receive Negative.
P89 PCIE0_A_TX0_P PCIE0_TX0_P/
B26 O, PCIe /
0.22uF AC Couple PCIe Channel-A Transmit Positive.
P90 PCIE0_A_TX0_N PCIE0_TX0_N/
C27 O, PCIe /
0.22uF AC Couple PCIe Channel-A Transmit Negative.
S76 PCIE_B_RST_B
(GPIO5_00) PCIE_CTRL1_
PERST_B/G25 O, 3.3V CMOS PCIe Channel-B RESET OUT.
S84 PCIE_B_REFCLK_P NA O, PCIe PCIe Channel-B Clock Positive.
Note: From External Oscillator.
S85 PCIE_B_REFCLK_N NA O, PCIe PCIe Channel-B Clock Negative.
Note: From External Oscillator.
S87 PCIE1_B_RX0_P PCIE1_RX0_P/
A21 I, PCIe PCIe Channel-B Receiver Positive.