TAHOE 8724 User Guide
Rev: 01
8/10/2017
Page 24 OF 45
Interface Masters Technologies Inc. Confidential & Proprietary
2.2
CPLD
2.2.1
CPLD Overview
The TAHOE 8724 uses Altera MAX II CPLD to control the basic functionality of
the board. The Internal Registers are accessed from the host CPU through a parallel bus
and from a Debug port through the SPI protocol.
Please refer to TAHOE 8724 CPLD Specification document for detail description.
CPLD is designed in to perform following functions:
a)
Orchestrate power & reset sequencing for CPU and various major components
b)
Drive LEDs
c)
Boot strap configuration
Figure 16, TAHOE 8724 CPLD Functional Diagram
