IM483H/IM805H Rev. R032206
44
45
IM483H/IM805H Rev. R032206
I n t e r f a c i n g t h e I M 4 8 3 H / I M 8 0 5 H I n p u t s
The inputs to the IM483H/IM805H are internally pulled up to the +5VDC sup-
ply. Figure 7.6 shows the inputs and their associated pull up resistor values. See
Section 2: Hardware Specifications
, for resistor tolerance.
When interfacing to the IM483H/IM805H logic inputs an open collector output
is recommended.
Figure 7.6: Input Pull-Up Resistors
1
4.99k
Ω
4.99k
Ω
4.99k
Ω
4.99k
Ω
4.99k
Ω
1.27k
Ω
2.21k
Ω
2.21k
Ω
+5V
FAULT IN
MSEL 0
MSEL 1
MSEL 2
MSEL 3
SCLK
DIR
ENABLE
P1
P2
Bottom View
RESET
If zero current is required at stand still
then the current reduction output (P1:3)
may be tied directly to the enable input
(P1:11). This will disable the outputs
0.5 seconds after the last step clock
input.
When the current reduction output is
used in this manner an open collector
output or blocking diode is
RE-
QUIRED
or damage may occur to the
internal circuitry. The diode or open
collector transistor should be placed
after the enable/reduction connection as
shown in figure 7.5.
If a voltage is used to set the output
current the current reduction output
(P1:3) will provide an open drain, ac-
tive low output that occurs 0.5 seconds
after the last step clock input and is
referenced to ground (P2:4) the RDS
ON
of the internal MOSFET is approxi-
matly 6.5
Ω
.
Figure 7.5: Interfacing the Current
Reduction Input
ENABLE/ REDUCTION
INPUT
ENABLE/ REDUCTION
INPUT
SCHOTTKY TYPE
INTERFACE
CIRCUIT
INTERFACE
CIRCUIT
OPEN COLLECTOR INTERFACE
BLOCKING DIODE
OR
