Intel
®
Celeron
®
Processor 1.66 GHz/1.83 GHz
January 2007
DS
Order Number: 315876-002
23
Electrical Specifications—Intel
®
Celeron
®
Processor 1.66 GHz/1.83 GHz
.
V
IH
Input High Voltage
100
V
CCP
V
CCP
+100
mV
3,6
V
IL
Input Low Voltage
-100
0
GTLREF-100
mV
2,4
V
OH
Output High Voltage
V
CCP
- 100
V
CCP
mV
6
R
TT
Termination Resistance
45
50
55
Ω
7,10
R
ON
Buffer On Resistance
22.3
25.5
28.7
W
5
I
LI
Input Leakage Current
± 100
µA
8
Cpad
Pad Capacitance
1.8
2.3
2.75
pF
9
Table 9.
CMOS Signal Group DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
1
V
CCP
I/O Voltage
0.997
1.05
1.102
V
V
IL
Input Low Voltage
CMOS
-0.1
0
0.33
V
2, 3
V
IH
Input High Voltage
0.7
1.05
1.20
V
2
V
OL
Output Low Voltage
-0.1
0
0.11
V
2
V
OH
Output High Voltage
0.9
V
CCP
1.2
V
2
I
OL
Output Low Current
1.3
4.1
mA
4
I
OH
Output High Current
1.3
4.1
mA
5
I
LI
Leakage Current
± 100
µA
6
Cpad1
Pad Capacitance
1.8
2.3
2.75
pF
7
Cpad2
Pad Capacitance for CMOS
Input
0.95
1.2
1.45
pF
8
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
The V
CCP
referred to in these specifications refers to instantaneous V
CCP
.
3.
Refer to the processor I/O Buffer Models for I/V characteristics.
4.
Measured at 0.1*V
CCP
.
5.
Measured at 0.9*V
CCP
.
6.
For Vin between 0V and V
CCP
. Measured when the driver is tristated.
7.
Cpad1 includes die capacitance only for PWRGOOD. No package parasitics are included.
8.
Cpad2 includes die capacitance for all other CMOS input signals. No package parasitics are included.
Table 8.
AGTL+ Signal Group DC Specifications (Sheet 2 of 2)
Notes:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
V
IL
is defined as the maximum voltage level at a receiving agent that is interpreted as a logical low
value.
3.
V
IH
is defined as the minimum voltage level at a receiving agent that is interpreted as a logical high
value.
4.
V
IH
and V
OH
may experience excursions above V
CCP
. However, input signal drivers must comply with
the signal quality specifications.
5.
This is the pull down driver resistance. Refer to processor I/O Buffer Models for I/V characteristics.
Measured at 0.31*V
CCP
. R
ON
(min) = 0.38*R
TT
,
R
ON
(typ) = 0.45*R
TT
,
R
ON
(max) = 0.52*R
TT
.
6.
GTLREF should be generated from V
CCP
with a 1% tolerance resistor divider. The V
CCP
referred to in
these specifications is the instantaneous V
CCP
.
7.
R
TT
is the on-die termination resistance measured at V
OL
of the AGTL+ output driver. Measured at
0.31*V
CCP
. R
TT
is connected to V
CCP
on die. Refer to processor I/O buffer models for I/V
characteristics.
8.
Specified with on die R
TT
and R
ON
are turned off.
9.
Cpad includes die capacitance only. No package parasitics are included.
10.
R
TT
for PREQ# is between 1.5k
Ω
and 6.0k
Ω
