Datasheet
9
Introduction
1.1
Terminology
1.2
References
Material and concepts available in the following documents may be beneficial when reading this
document. Please note that “platform design guides,” when used throughout this document, refers
to the platform design guides listed
below:
Term
Definition
#
A “#” symbol after a signal name refers to an active low signal, indicating a signal is in
the active state when driven to a low level. For example, when RESET# is low, a reset
has been requested. Conversely, when NMI is high, a nonmaskable interrupt has
occurred. In the case of signals where the name does not imply an active state but
describes part of a binary sequence (such as
address
or
data
), the “#” symbol implies
that the signal is inverted. For example, D[3:0] = “HLHL” refers to a hex ‘A’, and
D[3:0]# = “LHLH” also refers to a hex “A” (H= High logic level, L= Low logic level).
XXXX means that the specification or value is yet to be determined.
Front Side Bus
(FSB)
Refers to the interface between the processor and system core logic (also known as
the chipset components).
Table 1-1. References (Sheet 1 of 2)
Document
Document Number/
Location
1
Intel
®
Pentium
®
M Processor on 90 nm Process with 2-MB L2 Cache -
Specification Update
http://www.intel.com/
design/mobile/specupdt/
302209.htm
Mobile Intel
®
915PM/GM/GMS and 910GML Express Chipset Datasheet
http://www.intel.com/
design/mobile/datashts/
305264.htm
Mobile Intel
®
915PM/GM/GMS and 910GML Express Chipset Specification
Update
http://www.intel.com/
design/mobile/specupdt/
307167.htm
Intel
®
855PM Chipset Platform Design Guide: For use with Intel
®
Pentium
®
M and
Intel
®
Celeron
®
Processors
http://developer.intel.com/
design/mobile/desguide/
252614.htm
Intel
®
855PM Chipset Memory Controller Hub (MCH) Datasheet
http://developer.intel.com/
design/chipsets/datashts/
252613.htm
Intel
®
855PM Chipset MCH DDR 333/200/266 MHz Specification Update
http://developer.intel.com/
design/chipsets/specupdt/
253488.htm
Intel
®
855GM/GME Chipset Graphics and Memory Controller Hub (GMCH)
Datasheet
http://developer.intel.com/
design/chipsets/datashts/
252615.htm
Intel
®
855GM/GME Chipset Graphics and Memory Controller Hub (GMCH)
Chipset Specification Update
http://developer.intel.com/
design/chipsets/specupdt/
253572.htm
Intel
®
855GM/855GME Chipset Platform Design Guide
http://developer.intel.com/
design/mobile/desguide/
252616.htm
