![Intel ICH8 - MECHANICAL Information Manual Download Page 19](http://html1.mh-extra.com/html/intel/ich8-mechanical/ich8-mechanical_information-manual_2073471019.webp)
19
ICH8/ICH9—NVM Information Guide
1.4.20
Future Init Word 2 (Word 1Ah)
For
ICH9
, This word is loaded to bits 31:16 of the FEXTNVM register.
For
ICH8
:
1.4.21
82567MM Device ID (Word 1Eh)
1.4.22
82567MC Device ID (Word 1Fh)
1.4.23
82566DC Device ID (Word 22h)
Bit
Name
Default
Description
0
APM Enable
1
Initial value of
Advanced Power Management Wake Up Enable
in
the
Wake Up Control Register
(WUC.APME). Also mapped to
CTRL[6]. When the
APM Enable
bit is set, both the PHY and MAC
should be initialized to a functional state following power up. This
bit is also loaded to the FEXTNVM register (bit 16); however, the
bit in the FEXTNVM does not impact the device functionality.
15:1
Reserved
00h
Reserved
Bit
Name
Default
Description
15:0
Reserved
0800h
Reserved
This field is loaded to bits 15:0 of the FEXTNVM register.
Bit
Name
Default
Description
15:0
82567MM
DeviceID
10BEh
82567
Mobile Consumer DeviceID
ICH9 Device ID on PCI configuration space when the PHY is the
82567MM.
Bit
Name
Default
Description
15:0
82567MC
DeviceID
10BFh
82567
Mobile Corporate DeviceID
ICH9 Device ID on PCI configuration space when the PHY is
the 82567MC.
Bit
Name
Default
Description
15:0
82566DC
DeviceID
10BDh
82566
Desktop Corporate DeviceID
ICH9
Device ID on PCI configuration space when the PHY is
the
82566DC
.