Intel ICH8 - MECHANICAL, Information Manual

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ICH8/ICH9—NVM Information Guide
1.4.14 Extended Configuration Word 1 (Word 14h)
1.4.15 Extended Configuration Word 2 (Word 15h)
Table 11. Extended Configuration Word 1 (Word 14h)
Bit Name Default Description
15 D/UD Enable 0b
In the 82566/82567 PHY, this bit enables the extended dock or
undock configuration area in the MAC. It is loaded to the
EXTCNF_CTRL register. This setting is only available for the
82566/82567 PHY when used in conjunction with the ICH8M/
ICH9M (Mobile ICH8/ICH9 ).
Note: Contact your Intel Field Service Representative for
information on implementing this feature.
0b = Extended Dock and Undock Configuration areas are ignored.
1b = Enables loading the Extended Dock or Undock Configuration
area in the LAN controller.
This bit is reserved for other devices and must be set to 0b in those
components.
14 Reserved 1b
1b = ICH8 (B0/B1 stepping).
0b = ICH8 (A0 stepping).
Note: For the ICH9 , this is a reserved bit.
13 PHY Write Enable 1b
This bit loads the extended PHY configuration area in the MAC. It is
loaded to the EXTCNF_CTRL register.
0b = Extended PHY configuration area is ignored.
1b = Enables the PHY configuration area in the MAC.
Note: This bit is reserved for the 82566 and 82562V when used
with the ICH8 . This bit should be set to 0b.
12 OEM Write Enable 1b
When set, enables auto load of the OEM bits from the PHY_CTRL
register to the 82567 . It is loaded to the EXTCNF_CTRL register.
Note: This bit is reserved for the 82566 and 82562V and should
be set to 1b.
11:0
Extended
Configuration
Pointer
020h
This field defines the base address (in Dwords) of the extended
configuration area in the NVM. It should equal a non-zero value.
Table 12. Extended Configuration Word 2 (Word 15h)
Bit Name Default Description
15:8
Extended PHY
Length
• Desktop ICH8 with the 82566 = 38h.
• Mobile ICH8m with the 82566 = 50h.
• Desktop and mobile ICH9 with the 82566 = 3Bh.
For the 82566/82567 PHY, if the extended PHY configuration area
is disabled, the length must be set to 00h.
7:0 Reserved 00h These bits are reserved and should be set to 00h.