Intel ICH8 - MECHANICAL Information Manual Download Page 11

11

ICH8/ICH9—NVM Information Guide

1.4.6

PCI Initialization Control (Word 0Ah)

This word contains initialization values that:

• Set defaults for some internal registers.
• Enable/disable specific features.
• Determine which PCI configuration space values are loaded from the NVM.

1.4.7

Subsystem ID (Word 0Bh)

If Load Subsystem IDs bit of word 0Ah is set to 1b, this word is read in to initialize the 

Subsystem ID. The Subsystem ID default value is 0000h.

1.4.8

Subsystem Vendor ID (Word 0Ch)

If Load Subsystem IDs bit of word 0Ah is set to 1b, this word is read in to initialize the 

Subsystem Vendor ID. The Subsystem Vendor ID default value is 8086h.

Table 6.

Initialization Control Word (Word 0Ah)

Bit

Name

Default

Description

15:12

Reserved

0001b

This field is reserved and should be set to 0001b.

11:8

Reserved

0000b

These bits are reserved and should be set to 0000b.

7

AUX  PWR

1b

This bit is used as an auxiliary power indication. It is used in 

conjunction with the 

PM Enable

 bit.

0b = D3cold wake-up is not advertised.
1b = D3cold wake-up is advertised in the PMC register of the PCI 

function if the 

PM Enable

 bit is also set.

6

PM  Enable

1b

This bit enables the assertion of a PME in the PCI function at any 

power state. 
0b = PME functionality is disabled.
1b = PME functionality is enabled.
This bit affects the advertised PME_Support indication in the PMC 

register of the PCI function.

5:3

Reserved

00b

This bit is reserved and should be set to 00b.

2

APM  Enable

1b

When APM Enable is set, both the PHY (

82566

 or 

82562V

) and 

the MAC should be initialized to a functional state following power 

up.
0b = APM functionality is disabled.
1b = APM functionality is enabled.

Note:

 This is a reserved bit for the 

ICH8

 (B1 stepping) and the 

ICH9

.

1

Load Subsystem IDs 1b

0b = Device loads the default PCI Subsystem ID and Subsystem 

Vendor ID.
1b = Device loads its PCIe* Subsystem ID and Subsystem Vendor 

ID from the NVM (words 0Bh and 0Ch).

0

Load Vendor/Device 

IDs

1b

0b = Device loads the default PCI Vendor and Device IDs.
1b = Device loads the default values for PCI Vendor and Device IDs 

from the NVM (words 0Dh and 0Eh).

Summary of Contents for ICH8 - MECHANICAL

Page 1: ...Revision 2 6 Intel I O Controller Hub 8 9 LAN NVM Map and Information Guide April 2012...

Page 2: ...N WHETHER OR NOT INTEL OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN MANUFACTURE OR WARNING OF THE INTEL PRODUCT OR ANY OF ITS PARTS Intel may make changes to specifications and product description...

Page 3: ...ement Word 17h 16 1 4 18 LED 0 and 2 Configuration Defaults Word 18h 18 1 4 19 Future Initialization Word 1 Words 19h 18 1 4 20 Future Init Word 2 Word 1Ah 19 1 4 21 82567MM Device ID Word 1Eh 19 1 4...

Page 4: ...rd Offset 19h description to Tables 1 and 17 Added new EEPROM images to Appendix A Updated bit defaults and descriptions to Tables 9 10 13 15 and 16 1 75 April 2006 Updated bit descriptions for words...

Page 5: ...along with the BIOS Manageability Firmware and a Flash Descriptor Region It is programmed through the ICH8 ICH9 This combined image is shown in Figure 1 The Flash Descriptor Region is used to define v...

Page 6: ...re are two sets of VSCC registers the upper UVSCC and lower LVSCC Note that the LVSCC register is only used if the NVM attributes change For example the use of a second flash component a change in era...

Page 7: ...the IA address of the LAN controller In addition it also corrects the GbE component checksum field after the region is modified FTOOL does not have this ability For more information on how to use EEU...

Page 8: ...SW FFFFh 05h 0A Image Version Information 1 SW 06h 0Ch Reserved SW FFFFh 07h 0Eh Reserved SW FFFFh 08h 10h PBA Low SW 09h 12h PBA High SW 0Ah 14h PCI Initialization Control Word HW PCI 0Bh 16h Subsyst...

Page 9: ...eive Address Register 0 RAL0 RAH0 The Intel default is listed in Table 2 Note The Ethernet IA is byte swapped as listed in Table 2 The IA bytes read from the NVM are used by the ICH8 ICH9 until an IA...

Page 10: ...4h Bit Name Default Description 15 12 Reserved Word 03h 0000b These bits are reserved and should be set to 0000b 11 IBA LOM 1b Must be set to 1b for Intel Boot Agent IBA to function correctly 10 0 Res...

Page 11: ...junction with the PM Enable bit 0b D3cold wake up is not advertised 1b D3cold wake up is advertised in the PMC register of the PCI function if the PM Enable bit is also set 6 PM Enable 1b This bit ena...

Page 12: ...ntel Platform LAN Connects Device ID Adapter 1049h Intel 82566MM Gigabit Ethernet Controller 104Ah Intel 82566DM Gigabit Ethernet Controller 104Bh Intel 82566DC Gigabit Ethernet Controller 104Ch Intel...

Page 13: ...lization Control Word 13h Bit Name Default Description 15 14 SIGN 10b This is a 2 bit field indicating whether a valid NVM is present to the MAC If this field does not equal 10b the MAC does not read...

Page 14: ...b Note This is a reserved bit for the 82566 and 82562V 4 3 FD 0b Duplex Setting Default setting for duplex setting Mapped to CTRL 0 The hardware default value is 1b Note This is a reserved bit for the...

Page 15: ...d bit 13 PHY Write Enable 1b This bit loads the extended PHY configuration area in the MAC It is loaded to the EXTCNF_CTRL register 0b Extended PHY configuration area is ignored 1b Enables the PHY con...

Page 16: ...wer states including D0a 13 12 Reserved 00b These bits are reserved and should be set to 000b 11 GbE Disable in non D0a 1b For ICH9 this bit disables GbE operation in non D0a states This bit must be s...

Page 17: ...3 0 Selected Mode Source Indication 0000b LINK_10 1000 Asserted when either 10 Mb s or 1000 Mb s link is established and maintained 0001b LINK_100 1000 Asserted when either 100 Mb s or 1000 Mb s link...

Page 18: ...tial value of the LED2_MODE field which specifies the event state or pattern displayed on LED2 LINK_100 output A value of 0110b causes this to indicate 100 Mb s operation 7 LED0 Blink 1b This bit indi...

Page 19: ...is also loaded to the FEXTNVM register bit 16 however the bit in the FEXTNVM does not impact the device functionality 15 1 Reserved 00h Reserved Bit Name Default Description 15 0 Reserved 0800h Reserv...

Page 20: ...ault for this bit is 0b for backwards compatibility with existing systems already in the field If this bit is set to 0b EEPROM word 32h PXE Version is valid When EPB is set to 1b and this bit is set t...

Page 21: ...oes not appear if 0 seconds prompt time is selected 5 Reserved Reserved 4 3 DBS Default Boot Selection These bits select which device is the default boot device These bits are only used if the agent d...

Page 22: ...Expansion ROM supports in the BIOS and assumes the BIOS is not compliant The BIOS boot order can be changed in the Setup Menu 010b Force BBS mode The agent assumes the BIOS is BBS compliant even thou...

Page 23: ...is 0b allow changes to the boot protocol 1 DTM Disable Title Message If set to 1b the title message displaying the version of the boot agent is suppressed the Control S message is also suppressed Thi...

Page 24: ...he image Note The default image always has a checksum value of 0 The default image always has a checksum value of 0b The LAD programming tools EEUPDATE or LANCONF update the checksum when the image is...

Page 25: ...s an internal initialization loop Word Address relative to base address Used By 15 8 7 0 00h 01h HW PHY Extended Configuration Dword 0 HW 2 N 1 h 2N 1 h HW PHY Extended Configuration Dword N 1 1 1 N n...

Page 26: ...iguration listed in Table 22 1 5 3 Undock Extended Configuration Words 2N 2L h 2N 4L 1 h From Base There are L valid Dwords in this range where L number of Undock Dwords as determined in the Extended...

Page 27: ...h Subsystem Vendor ID 0Dh Device ID 0Eh Vendor ID 0Fh Device Revision ID ICH9 Reserved ICH8 10h LAN Power Consumption 11 12h Reserved 13h Shared Initialization Control Word 14 16h Extended Configurati...

Page 28: ...NVM Information Guide ICH8 ICH9 28 Note This page intentionally left blank...

Reviews: