DKHiQV-AGP (Fab. Rev. A) User’s Guide
18
&+,36
DKHiQV-AGP (Fab. Rev. A) Subject to Change Without Notice
Revision 1.0 7/13/98
Note:
Refer to schematics for additional information.
JP9
1-2
2-3
3-4
1-4
JP9/JP10 pin 1 is driven by 32KHZ/GPIO1/GPIO2.
JP9 pin 3 is driven by 32KHZ/GPIO1/CSYNC
JP9 pin 3 is driven by ENABKL/GPIO1/CSYNC
JP9/JP10 pin 1 is driven by ENABKL/GPIO1/CSYNC
JP10
1-2
2-3
3-4
1-4
JP9/JP10 pin 1 is driven by 32KHZ/GPIO1/GPIO2.
32 KHz oscillator drives 32KHZ/GPIO1/GPIO2 signal
(NOT VALID)
JP9/JP10 pin 1 is driven by 54GPIO2
JP11
1-2
2-3
3-4
1-4
ENAVEE panel voltage control is driven by ENABKL/GPIO1/CSYNC
ENABKL panel control is driven by ENABKL/GPIO1/CSYNC
ENABKL panel control is driven by ENAVEE/ENABKL
ENAVEE panel voltage control is driven ENAVEE/ENABKL
JP12
1-2
2-3
3-4
1-4
CSYNC for TV Out is driven by ENABKL/GPIO/CSYNC.
Activity LED is driven by ENABKL/GPIO1/CSYNC.
Activity LED is driven by ACTI/GPIO0/CSYNC.
CSYNC for TV Out is drivven by ACTI/GPIO0/CSYNC.
JP13
OPEN
CLOSED
CSYNC for TV out from JP11 or JP12.
CSYNC for TV out from CSYNC/HSYNC.
JP15
1-2
OPEN
P34 panel data for 36-bit panels
JP16
1-2
OPEN
P35 panel data for 36-bit panels
JP17
1-2
OPEN
P32 panel data for 36-bit panels
JP18
1-2
OPEN
P30 panel data for 36-bit panels
JP19
1-2
OPEN
P33 panel data for 36-bit panels
JP20
1-2
OPEN
P31 panel data for 36-bit panels
