DKHiQV-AGP (Fab. Rev. A) User’s Guide
6
&+,36
DKHiQV-AGP (Fab. Rev. A) Subject to Change Without Notice
Revision 1.0 7/13/98
Figure 2. provides the 12 additional data bits needed for 36-bit panels on J11.:
Figure 2: 36 Bit Flat Panel Connector Pinout
3.3.4
Simultaneous Display Interface
The DKHiQV-AGP board supports simultaneous flat panel and CRT displays. The HiQVideo
controllers
supports 60 Hz vertical refresh for simultaneous display CRT and TFT/SSTN color panels. Simultaneous
display of CRT and DDSTN with 60 Hz vertical refresh on the CRT and 120 Hz vertical refresh on the ST-
NDD panel are also supported. In this mode, the ENAVEE(61), ENABKL (54), ACTI (53), M (69) and LP
(68) pins have multiple functions. For detailed functions, and implementations, please refer to the 69000
Databook and the DKHiQV-AGP schematics.
3.3.5
Activity Indicator
The HiQVideo
controller provides an output pin called ACTI (69000 pin V1) to facilitate an orderly power-
down sequence. The ACTI output is an active high signal which is driven high every time the CPU executes
a valid VGA memory read/write operation or VGA I/O read/write operation. The DKHiQV-AGP board has
an LED (D7) on the ACTI pin which will glow whenever there is a VGA Access. This pin is configured as
Activity Indicator by default when FR0C[4:3]=00. The power management logic may use this signal to put
the HiQVideo
controller into Panel Off or Standby power modes.
Table 2 summarizes the HiQVideo
pin connections for the different flat panel configurations.
Refer to the 69000 Databook for the 36-pin panel support information and pin assignments.
Name
Pin #
Pin #
Name
GND
1
2
P24
GND
3
4
P25
GND
5
6
P26
GND
7
8
P27
GND
9
10
P28
GND
11
12
P29
GND
13
14
P30
GND
15
16
P31
GND
17
18
P32
GND
19
20
P33
GND
21
22
P34
GND
23
24
P35
GND
25
26
GND
