Intel Celeron P4000 Series, Datasheet

Page: 99 / 181

Datasheet 99
Electrical Specifications
NOTES:
1. These are pre-silicon estimates and are subject to change.
2. Minimum values assume Graphics Render C-state (RC6) is enabled.
3. V
AXG
is a VID-Based rail driven by an Intel MVP6.5 compliant voltage regulator.
4. This specification assumes Intel Turbo Boost Technology with Intelligent Power Sharing is enabled.
Table 7-42.Processor Graphics VID based (V
AXG
) Supply DC Voltage and Current
Specifications
Symbol Parameter Min Typ Max Unit Note
1
GFX_VID VID Range for V
AXG
SV
ULV 0
0 1.4
1.35
V 2,3,4
V
AXG
Graphics core voltage See Figure 7-15
TOL
AXG
V
AXG
Tolerance See Figure 7-15
Non-VR LL
contribution Non-VR Load Line Contribution for
V
AXG
rPGA
BGA
4
4.25
m
Ω
LL
AXG
V
AXG
Loadline -7 m
Ω
I
CCMAX_VAXG
Max Current for Integrated
Graphics Rail
SV
ULV -
22
12
A 4
I
CCTDC_VAXG
Thermal Design Current
(TDC) for Integrated Graphics Rail
SV
ULV -
12
6
A 4
Figure 7-15.V
AXG
/I
AXG
Static and Ripple Voltage Regulation
I
CCMAX_VAXG
V
AXG
[V]
V
AXG_NOM
= GFX_VID
V
AXG
Total tolerance window (GFX_DPRSLPVR de-asserted)
DC (set point +LL tol AC (ripple)
for Standard and Enhanced Performance Frequency Modes
V
AXG_MAX
=
V
AXG_NOM
+2.2%*GFX_VID
I
AXG
[A]
0
Slope = LL
AXG
at package VAXG_SENSE, and VSSAXG_SENSE pins
Differential Remote Sense required.
+/ -VID *2.2%
V
AXG_MIN
=
V
AXG_NOM
-LL
AXG
*I
CCMAX_VAXG
-2.2%*GFX_VID