Intel 80C196NU, User Manual

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8XC196NP, 80C196NU USER’S MANUAL
C-22
EPAx_CON
1 ROT Reset Opposite Timer
Controls different functions for capture and compare modes.
In Capture Mode:
0 = causes no action
1 = resets the opposite timer
In Compare Mode:
Selects the timer that is to be reset if the RT bit is set.
0 = selects the reference timer for possible reset
1 = selects the opposite timer for possible reset
The TB bit (bit 7) selects which is the reference timer and which is the
opposite timer.
0 ON/RT Overwrite New/Reset Timer
The ON/RT bit functions as overwrite new in capture mode and reset
timer in compare mode.
In Capture Mode (ON):
An overrun error is generated when an input capture occurs while the
event-time register (EPA
x _TIME) and its buffer are both full. When an
overrun occurs, the ON bit determines whether old data is overwritten or
new data is ignored:
0 = ignores new data
1 = overwrites old data in the buffer
In Compare Mode (RT):
0 = disables the reset function
1 = resets the ROT-selected timer
EPA x _CON (Continued)
x
= 0–3
Address:
Reset State:
Table C-8
The EPA control (EPA x _CON) registers control the functions of their assigned capture/compare
channels. The registers for EPA0 andEPA2 are identical. The registers for EPA1 and EPA3 have an
additional bit, the remap bit. This added bit (bit 8) requires an additional byte, so EPA1_CON and
EPA3_CON must be addressed as words, while the others can be addressed as bytes.
15 8
x = 1, 3 — — — — — — — RM
7 0
TB CE M1 M0 RE — ROT ON/RT
7 0
x = 0, 2 TB CE M1 M0 RE — ROT ON/RT
Bit
Number
Bit
Mnemonic
Function
†
These bits apply to the EPA1_CON and EPA3_CON registers only.