Intel 2ND GENERATION INTEL CORE PROCESSOR FAMILY MOBILE - SPECIFICATION UPDATE 01-2011, Specification

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Specification Update 9
BJ6
X X No Fix
Code Segment Limit/Canonical Faults on RSM May be Serviced before Higher
Priority Interrupts/Exceptions and May Push the Wrong Address Onto the Stack
BJ7
X X No Fix
Corruption of CS Segment Register During RSM While Transitioning From Real
Mode to Protected Mode
BJ8
X X No Fix
Debug Exception Flags DR6.B0-B3 Flags May be Incorrect for Disabled
Breakpoints
BJ9
X X No Fix
DR6.B0-B3 May Not Report All Breakpoints Matched When a MOV/POP SS is
Followed by a Store or an MMX Instruction
BJ10
X X No Fix
EFLAGS Discrepancy on Page Faults and on EPT-Induced VM Exits after a
Translation Change
BJ11
X X No Fix Fault on ENTER Instruction May Result in Unexpected Values on Stack Frame
BJ12
X X No Fix Faulting MMX Instruction May Incorrectly Update x87 FPU Tag Word
BJ13
X X No Fix FREEZE_WHILE_SMM Does Not Prevent Event From Pending PEBS During SMM
BJ14
X X No Fix
General Protection Fault (#GP) for Instructions Greater than 15 Bytes May be
Preempted
BJ15
X X No Fix
#GP on Segment Selector Descriptor that Straddles Canonical Boundary May Not
Provide Correct Exception Error Code
BJ16
X X No Fix IO_SMI Indication in SMRAM State Save Area May be Set Incorrectly
BJ17
X X No Fix
IRET under Certain Conditions May Cause an Unexpected Alignment Check
Exception
BJ18
X X No Fix LER MSRs May Be Unreliable
BJ19
X X No Fix
LBR, BTS, BTM May Report a Wrong Address when an Exception/Interrupt Occurs
in 64-bit Mode
BJ20
X X No Fix
MCi_Status Overflow Bit May Be Incorrectly Set on a Single Instance of a DTLB
Error
BJ21
X X No Fix MONITOR or CLFLUSH on the Local XAPIC's Address Space Results in Hang
BJ22
X X No Fix MOV To/From Debug Registers Causes Debug Exception
BJ23
X X No Fix PEBS Record not Updated when in Probe Mode
BJ24
X X No Fix
Performance Monitoring Event FP_MMX_TRANS_TO_MMX May Not Count Some
Transitions
BJ25
X X No Fix
REP MOVS/STOS Executing with Fast Strings Enabled and Crossing Page
Boundaries with Inconsistent Memory Types may use an Incorrect Data Size or
Lead to Memory-Ordering Violations
BJ26
X X No Fix
Reported Memory Type May Not Be Used to Access the VMCS and Referenced
Data Structures
BJ27
X X No Fix Single Step Interrupts with Floating Point Exception Pending May Be Mishandled
BJ28
X X No Fix Storage of PEBS Record Delayed Following Execution of MOV SS or STI
BJ29
X X No Fix The Processor May Report a #TS Instead of a #GP Fault
BJ30
X X No Fix VM Exits Due to “NMI-Window Exiting” May Be Delayed by One Instruction
BJ31
X X No Fix Pending x87 FPU Exceptions (#MF) May be Signaled Earlier Than Expected
BJ32
X X No Fix Values for LBR/BTS/BTM Will be Incorrect after an Exit from SMM
BJ33
X X No Fix Unsupported PCIe Upstream Access May Complete with an Incorrect Byte Count
Errata (Sheet 2 of 4)
Number
Steppings
Status ERRATA
D-2 Q-0