12
Specification Update
Identification Information
Component Identification using Programming Interface
The processor stepping can be identified by the following register contents:
Note:
1.
The Extended Family, bits [27:20] are used in conjunction with the Family Code, specified in bits [11:8],
to indicate whether the processor belongs to the Intel386, Intel486, Pentium, Pentium Pro, Pentium 4,
or Intel
®
Core™ processor family.
2.
The Extended Model, bits [19:16] in conjunction with the Model Number, specified in bits [7:4], are
used to identify the model of the processor within the processor’s family.
3.
The Processor Type, specified in bits [13:12] indicates whether the processor is an original OEM
processor, an OverDrive processor, or a dual processor (capable of being used in a dual processor
system).
4.
The Family Code corresponds to bits [11:8] of the EDX register after RESET, bits [11:8] of the EAX
register after the CPUID instruction is executed with a 1 in the EAX register, and the generation field of
the Device ID register accessible through Boundary Scan.
5.
The Model Number corresponds to bits [7:4] of the EDX register after RESET, bits [7:4] of the EAX
register after the CPUID instruction is executed with a 1 in the EAX register, and the model field of the
Device ID register accessible through Boundary Scan.
6.
The Stepping ID in bits [3:0] indicates the revision number of that model. See
for the processor
stepping ID number in the CPUID information.
When EAX is initialized to a value of ‘1’, the CPUID instruction returns the Extended
Family, Extended Model, Processor Type, Family Code, Model Number and Stepping ID
value in the EAX register. Note that the EDX processor signature value after reset is
equivalent to the processor signature output value in the EAX register.
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX
registers after the CPUID instruction is executed with a 2 in the EAX register.
The processor can be identified by the following register contents:
Notes:
1.
The Vendor ID corresponds to bits 15:0 of the Vendor ID Register located at offset 00–01h in the PCI
function 0 configuration space.
2.
The Host Device ID corresponds to bits 15:0 of the Device ID Register located at Device 0 offset 02–03h
in the PCI function 0 configuration space.
3.
The Processor Graphics Device ID (DID2) corresponds to bits 15:0 of the Device ID Register located at
Device 2 offset 02–03h in the PCI function 0 configuration space.
4.
The Revision Number corresponds to bits 7:0 of the Revision ID Register located at offset 08h in the PCI
function 0 configuration space.
Reserved
Extended
Family
1
Extended
Model
2
Reserved
Processor
Type
3
Family
Code
4
Model
Number
5
Stepping
ID
6
31:28
27:20
19:16
15:14
13:12
11:8
7:4
3:0
00000000b
0010b
00b
0110
1010b
xxxxb
Stepping
Vendor ID
1
Host Device ID
2
Processor Graphics
Device ID
3
Revision ID
4
D-2
8086h
0100h
GT1: 0102h
GT2: 0112h
GT2 (>1.3 GHz Turbo): 122h
09h
Q-0
8086h
0100h
GT1: 0102h
GT2: 0112h
GT2 (>1.3 GHz Turbo): 122h
09h
