© 2019 Infinite Electronics, Inc. Pasternack is a registered trademark of Infinite Electronics, Inc.
27
16:15
R/W
lkd_ringosc_cfg
3
“0” fastest “3” slowest
18:17
R/W
lkd_monost_duration
3
“0” shortest “3” longest
19
R/W
lkd_ringosc_testmode
0
enables the ring osc by itself for testing
7.29 Reg 1Bh GPO Control Register
Bit
Type
Name
Default
Description
3:0
R/W
gpo_sel
0
Selects data to be driven on GPO ports
gpo_sel<3:0> = 0000
GPO3 <=gposel_0_data<2> GPO2 <=
gposel_0_data<1> GPO1 <= gposel_0_data<0>
gpo_sel<3:0> = 0001
GPO3 <= xref_clk_in GPO2 <= ref_clk_in GPO1
<= vco_div_clkin
gpo_sel<3:0> = 0010
GP03 <= pfd_up_in GP02 <= pfd_dn_in
GP01 <= LKD_monost_window
gpo_sel<3:0> = 0011
GP03 <= pfd_sat_ref_in GP02 <=
pfd_sat_vco_div_in
GP01 <= delta_integer_cycslip_sel, this strobe
holds the gain of the PFD at max for anti-cycle
slipping
gpo_sel<3:0> = 0100
GP03 <= xref_clk_in GP02 <= xref_sin_in
GP01 <= sd_frac_strobe_sync, internally
synchronized frac strobe
gpo_sel<3:0> = 0101
VCO Serial Port Mirror GPO3 - VSDO
GPO2 = VSCK
GPO1 = SVLE
gpo_sel<3:0> = 0110
GP03 <= SD_Intz1<1> GP02 <=SD_Intz1<2>
GP01 <= SD_Intz1<3>
3-bit quantized version of the VCO phase
gpo_sel<3:0> = 0111
GP03 <= aux_clk GP02 <= ringosc_test GP01
<= clk_SD
gpo_sel<3:0> = 1000
GP03 <= 00
GP02 <= ramp_busy GP01 <= vcot_busy
gpo_sel<3:0> = 1001
Not used
gpo_sel<3:0> = 1010
GP03 <= Δ∑ Quantizer Output 3rd lsb GP02 <=
Δ∑ Quantizer Output 2nd lsb GP01 <= Δ∑
Quantizer Output lsb
6:4
R/W
gpo_sel_0_data
0
this data is driven on gpo if gpo_sel==0
7
R/W
gpo_dig_drive_en
1
enables Tri-state drivers on GPO output pads
10:8
R/W
Chip ID 478732
Reserved
Chip ID 481502
gpo_ind_drive_dis
0
0
reserved must write 0 on Chip ID 478732
Chip ID 481502 Only
000 = all GPO pad drivers enabled xx1 = disable
GPO1 pad driver
