Design Guide
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V 1.0
2018-06-06
XDPL8218 design guide
For high power factor flyback converter with constant voltage output
Fine-tuning guide
18
Fine-tuning guide
This section presents guidelines for how to fine-tune the value of a few essential XDPL8218 parameters, based
on the actual measurement waveform or data.
18.1
Input voltage-sensing parameter fine-tuning
When the primary MOSFET is switched on, the XDPL8218 measures the current flowing out of the ZCD pin -I
IV
, to
estimate the DC link filter capacitor voltage V
DC,filter
.
Ideally, V
DC,filter
should be a low-frequency (e.g. typically 100 Hz ~ 120 Hz) rectified sinusoidal waveform, as
shown in
, where the peak value of V
DC,filter
is equal to AC input peak value V
in,peak
,
and the estimated
input voltage V
in
in rms value is assumed to be 0.707 times V
in,peak
. However, due to the input line filter
impedance and the filter capacitor ESR, the actual V
DC,filter
has high switching frequency ripple (in the kHz range)
over the low-frequency sinusoidal waveform, whose ripple peak-to-peak voltage level varies based on the peak
current being drawn by the transformer primary main winding. Step III of
shows an example of the
actual V
DC,filter
waveform.
To improve the input voltage estimation accuracy, R
in
parameter fine-tuning is important for the IC to estimate
the correct V
in,peak
by compensating such switching frequency ripples, which appears in -I
IV
measurements as
well.
N
a
N
p
V
DC,filter
ZCD
V
AUX
I
IV
V
INPCLN
R
ZCD,1
R
ZCD,2
GD
C
DC,filter
V
DC,filter
V
in,peak
R
CS
R
G
V
CS
V
in
C
ZCD
Figure 25
–I
IV
measurement for input voltage sensing
shows the recommended procedures for R
in
parameter fine-tuning.
Table 13
Recommended procedures for R
in
parameter fine-tuning
Step Instruction
I
Apply two voltage probes on the board, which respectively measure the waveform of the DC link
filter capacitor voltage V
DC,filter
and CS pin voltage V
CS
.
II
Ensure the target XDPL8218 has already been burned with at least a first full set of parameters.
Power up the board with normal operational minimum AC input voltage V
AC,min
and full load output.
If it cannot be powered up, retry by burning the input UVP to enable switch parameter EN
UVP,In
as
“Disabled” (if it was not before) or refer
Section 19
for the debugging guide.
III
Capture the voltage waveform with a time base of 1 ms and zoom into the peak voltage for
measuring the minimum level of the V
DC,filter
high-frequency voltage ripple (V
DC,HF,RIPPLE,MIN
) and the
maximum level of V
CS
(V
CS,max
). Below is an example of a waveform captured on the 40 W reference
design with V
AC,min
= 90 V
rms
, F
line
= 60 Hz and full-load output (I
out
= 0.8 A).
