XC886/888CLM
Power Supply, Reset and Clock Management
User’s Manual
7-1
V1.3, 2010-02
Power, Reset and Clock, V 1.0
7
Power Supply, Reset and Clock Management
The XC886/888 provides a range of utility features for secure system performance under
critical conditions (e.g., brownout).
The power supply to the core, memories and the peripherals is regulated by the
Embedded Voltage Regulator (EVR) that comes with detection circuitries to ensure that
the supplied voltages are within the specified operating range. The main voltage and low
power voltage regulators in the EVR may be independently switched off to reduce power
consumption for the different power saving modes.
At the center of the XC886/888 clock system is the Clock Generation Unit (CGU), which
generates a master clock frequency using the Phase-Locked Loop (PLL) and oscillator
units. In-phase synchronized clock signals are derived from the master clock and
distributed throughout the system. A programmable clock divider is available for scaling
the master clock into lower frequencies for power savings.
7.1
Power Supply System with Embedded Voltage Regulator
The XC886/888 microcontroller requires two different levels of power supply:
•
3.3 V or 5.0 V for the Embedded Voltage Regulator (EVR) and Ports
•
2.5 V for the core, memory, on-chip oscillator, and peripherals
shows the XC886/888 power supply system. A power supply of 3.3 V or 5.0 V
must be provided from the external power supply pin. The 2.5 V power supply for the
logic is generated by the EVR. The EVR helps reduce the power consumption of the
whole chip and the complexity of the application board design.
Figure 7-1
XC886/888 Power Supply System
On-chip
OSC
CPU &
Memory
V
DDC
(2.5V)
V
DDP
(3.3V/5.0V)
V
SSP
GPIO Ports
(P0-P5)
EVR
Peripheral
logic
FLASH
ADC
PLL
XTAL1&
XTAL2
*