User Manual
117
Rev. 1.1
2019-03-18
TLE984xQX
Microcontroller with LIN and Power Switches for Automotive Applications
System Control Unit - Digital Modules (SCU-DM)
Table 46 RESET
Register Reset Type
Reset Values
Reset Short Name
Reset Mode
Note
RESET_TYPE_4
00000000
H
RESET_TYPE_4
Table 47 Possible Clock Configurations
Scenarios
1)
1) besides of this scenarios which represent a kind of worst case all other scenarios shall not lead to an unrecoverable
system state.
f
sys
[MHz]
pclk [MHz]
pba0_clk
[MHz]
mi_clk [MHz] tfilt_clk
[MHz]
1:lowest possible system
frequency
5
< 5
< 5
< 20
< 2
2: max. frequency scenario 1 25
< 25
< 25
< 20
< 2
3: max. frequency scenario 2 40
< 40
< 40
< 20
< 2
Table 48 Suggested Value for APCLK
Clock Frequency
APCLK1FAC
APCLK2FAC
24 Mhz (Pll clk)
00
H
0B
H
40 Mhz (Pll clk)
01
H
13
H
