CYTVII-B-E-2M-176-CPU Evaluation Board User Guide, Document Number. 002-29049 Rev. **
7
Overview
2.1
Functional Overview
The CPU board has the following features:
1. One Traveo II device, either soldered or mounted on a socket (U4).
2. PMIC to generate the 5 V and 3.3 V output depending on the Jumper J23 selection, which pow-
ers the CPU board and the base board (if connected).
3. Programming interface (JTAG-20, MiniProg3, SWD, and IDC-20, Mictor trace port) to connect
several programming tools such as IAR I-jet, Green Hills GHS, MiniProg.
4. USB-UART interface for terminal logging (J12).
5. One user switch (SW3) and one user LED (LED5) for standalone operation without the base
board.
6. Reset controller with manual reset switch (SW2) and voltage supervision.
7. Measurement of device current on VDDIO, VDDA, and VDDD using jumpers J6, J8, and J10
respectively.
8. Samtec connector interface (J21 and J22) for connecting to the base board CYTVII-B-E-BB.
The Traveo II base board has the following features:
1. Six CAN-FD transceivers based on TJA1057GT (Dual connectors P6, P7, P8).
2. Four CAN-FD transceivers based on TJA1145T, with SPI-based transceiver configuration (Dual
connectors P9, P10).
3. Six LIN transceivers based on TJA1021T (Dual connectors (Dual connectors P3, P4, P5).
4. Two Flexray transceivers based on TJA1081TS (Dual connector P2).
5. One CXPI transceiver based on S6BT112A01 (Connector P1).
6. One SPI EEPROM 25LC320A (U9).
7. Five user switches (SW1 through SW5), 10 user LEDs (USER_LED0 through USER_LED9),
and one potentiometer (POT1) for analog input.
8. Pin headers to access all I/Os of the TVII device (when a CPU board is connected to the base
board).
9. Samtec connector interface (J38 and J84) for connecting to a CPU board.
Summary of Contents for Cypress CYTVII-B-E-2M-176-CPU
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