Aurix
™ Lite-Kit V1.1
Hardware Description
Board Users Manual
7
Revision June, 2020
1) Address range starts at lowest address defined in the User’s Manual. For reference see the Memory Maps chapter of the User’s Manual.
2) To ensure the processor cores are provided with a constant stream of instructions the Instruction Fetch Units will speculatively fetch
instructions from the up to 64 bytes ahead of the current PC. If the current PC is within 64 bytes of the top of an instruction memory the
Instruction Fetch Unit may attempt to speculatively fetch instruction from beyond the physical range. This may then lead to error conditions
and alarms being triggered by the bus and memory systems. It is therefore recommended that the upper 64 bytes of any memory be unused
for instruction storage.
These boards are neither cost nor size optimized and do not serve as a reference design.
1.1
Block Diagram
The block diagram in Figure 1 shows the main components of the Aurix
™ Lite-Kit V1.1 and their
interconnections.
Figure 1
Block Diagram of the Aurix
™ TC275 Lite Kit