CPU_45A-V3
CPU Board XMC4500 General Purpose
Production Data
Board User's Manual
31
Revision 1.0, 2014-01-10
Figure 29 Schematic of On-board Debugger
15pF/0402
15pF/0402
100nF/0402
no ass./10nF/0402
100nF/0402
100nF/0402
4u7F/0805
100nF/0402
100nF/0402
100nF/0402
10uF/10V/0805
100nF/0402
100nF/0402
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
BLM18PG600
12MHZ/S/3.2X2.5
510R/0603
33R/0402
33R/0402
10k/0402
680R/0603
1M/0402
4k7/0402
10k/0402
no ass./33R/0402
VDD3.3
VDD3.3
VDD5
VDD3.3
VDD3.3
VDD3.3
XMC4200_QFN48
NC7WZ07P6X
ESD8V0L2B-03L
BAS3010A-03W
LED-GN/D/0603
ZX62-AB-5PA
no ass.
COMDIS#
CS
CS
DBG2PRES#
DBGPRES#
DEBUG_LED#
P0.7
P1.4
P1.5
P2.1
P2.1
RESET#
TCK
TCK
TMS
WPORST#
WTCK
WTMS
C500
C501
C502
C503
C504
C505
C506
C507
C508
C509
C510
C511
C512
L500
Q500
R500
R501
R502
R503
R504
R505
R506
R507
R508
EPAD
EPAD
HIB_IO_0
7
P0.0
2
P0.1
1
P0.2
48
P0.3
47
P0.4
46
P0.5
45
P0.6
44
P0.7
43
P0.8
42
P1.0
40
P1.1
39
P1.2
38
P1.3
37
P1.4
36
P1.5
35
P2.0
26
P2.1
25
P2.2
24
P2.3
23
P2.4
22
P2.5
21
P14.0
16
P14.3
15
P14.4
14
P14.5
13
P14.6
12
P14.7
11
P14.8
20
P14.9
19
PORST#
32
RTC_XTAL_1
8
RTC_XTAL_2
9
TCK
34
TMS
33
USB_D+
4
USB_D-
3
VAGND
17
VAREF
18
VBAT
10
VDDC
6
VDDC1
31
VDDP
5
VDDP1
28
VDDP2
41
VSS
27
XTAL1
29
XTAL2
30
U500
1A
1
1Y
6
2A
3
2Y
4
GND
2
VCC
5
U501
1
2
3
V500
A
C
V501
V502
1
2
3
4
5
X500C
X500S
1
2
3
4
X501
1
2
3
4
5
6
7
8
A
B
C
D
E
8
7
6
5
4
3
2
1
E
D
C
B
A
CPU_45A-V3-2
05.11.2013 09:55:58
5/5
Sheet:
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
USB
Supply
Analog
Digital
Hibernate/RTC
D1
D2
V3-2 / 05.11.2013 / Ma
On-board Debugger
SCLKOUT-P1.1
DX0B-P1.4
DX0D-P0.0
DOUT0-P2.5
DX0A-P2.2
SPI Slave
TMS
TCK
TDI
TDO
MOSI
CLK_OUT
MISO
MISO
CS_IN
CLK_IN
MOSI
CS_OUT
SPI Master
RXD
UART
U0C0
U0C1
U1C1
DOUT0-P1.5
SELO0-P1.0
DX2A-P2.3
DX1A-P2.4
RXD
TXD
UART2 (DM2)
RXD
TXD
DX0A-P0.4
DOUT0-P0.5
U1C0
SWV
On-board Debugger Concept
TXACTIVE#
GPIO-P0.6
EN#
RESET#
RESET#
GPIO-P0.3
DEBUG_LED#
DEBUG_LED#
GPIO-P0.2
On-board Debugger
TDO
TDI
SWV
TCK
TMS
Configure COMDIS# as open-drain output
Configure Debugger-P0.5 as USIC_Tx but only active while X-spy function is selected
Configure Debugger-P0.4 as USIC_Rx but only active while X-spy function is selected
Configure Debugger-P0.3 as RESET# detect input but with additional open-drain output capabilities
EN#
TXD
RXD
