![Infineon Technologies CPU_45A-V3 User Manual Download Page 29](http://html1.mh-extra.com/html/infineon-technologies/cpu_45a-v3/cpu_45a-v3_user-manual_2055443029.webp)
CPU_45A-V3
CPU Board XMC4500 General Purpose
Production Data
Board User's Manual
29
Revision 1.0, 2014-01-10
Figure 27 Schematic of XMC4500
AGND
AGND
AGND
100nF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
10uF/10V/0805
100nF/0402
100nF/0402
100nF/0402
15pF/0402
15pF/0402
15pF/0402
15pF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
100nF/0402
10uF/10V/0805
10uF/10V/0805
10uF/10V/0805
10uF/10V/0805
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
BLM18PG600
BLM18PG600
32.768kHz
12MHZ/S/3.2X2.5
POTI/10K/VERT
680R/0603
4k7/0402
10k/0402
4k7/0402
2k2/0603
2k2/0603
10k/0402
10k/0402
510R/0603
219-02
VDDP
VDD5USB
VDD3.3
VDDP
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VDD3.3
VBAT
XMC4500_LQFP144
74LVC1G66DCK
N25Q032A13ESE40
74LVC1G66DCK
74LVC1G66DCK
74LVC1G66DCK
74LVC1G66DCK
LED-GE/D/0603
P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15]
P0.[0..15],P1.[0..15],P2.[0..15],P3.[0..15],P4.[0..7],P5.[0..11],P6.[0..6],P14.[0..15],P15.[2..15]
CCU81_OUT30
CCU81_OUT31
COMDIS#
COM_RXD
COM_TXD
DBGPRES#
DSD_DIN3A
HIB_IO_0
HIB_IO_1
OTG_FS_DM
OTG_FS_DP
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
P0.8
P0.9
P0.10
P0.11
P0.12
P0.13
P0.13
P0.14
P0.14
P0.15
P0.15
P1.0
P1.1
P1.2
P1.3
P1.4
P1.4
P1.5
P1.5
P1.6
P1.7
P1.8
P1.9
P1.10
P1.11
P1.12
P1.13
P1.14
P1.15
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P2.8
P2.9
P2.10
P2.11
P2.12
P2.13
P2.14
P2.14
P2.15
P3.0
P3.1
P3.2
P3.3
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.9
P3.10
P3.11
P3.12
P3.13
P3.14
P3.14
P3.15
P3.15
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
P5.0
P5.1
P5.2
P5.3
P5.4
P5.5
P5.6
P5.7
P5.8
P5.8
P5.9
P5.10
P5.11
P6.0
P6.0
P6.1
P6.1
P6.2
P6.3
P6.4
P6.5
P6.5
P6.6
P14.0
P14.1
P14.1
P14.2
P14.3
P14.4
P14.5
P14.6
P14.7
P14.8
P14.9
P14.12
P14.13
P14.14
P14.15
P15.2
P15.3
P15.4
P15.5
P15.6
P15.7
P15.8
P15.9
P15.12
P15.13
P15.14
P15.15
RESET#
TCK
TCK
TMS
TMS
VAREF
VDDC
C300
C301
C302
C303
C304
C305
C306
C307
C308
C309
C310
C311
C312
C315
C316
C317
C318
C319
C320
C321
C322
C323
C324
C325
C326
3
2
1
JP300
L300
L301
Q301
Q302
A
E
S
R300
R301
R302
R303
R304
R306
R307
R309
R310
R313
1
2
3
4
SW300
EPAD
EXP
HIB_IO_0
21
HIB_IO_1
20
P0.0
2
P0.1
1
P0.2
144
P0.3
143
P0.4
142
P0.5
141
P0.6
140
P0.7
128
P0.8
127
P0.9
4
P0.10
3
P0.11
139
P0.12
138
P0.13
137
P0.14
136
P0.15
135
P1.0
112
P1.1
111
P1.2
110
P1.3
109
P1.4
108
P1.5
107
P1.6
116
P1.7
115
P1.8
114
P1.9
113
P1.10
106
P1.11
105
P1.12
104
P1.13
103
P1.14
102
P1.15
94
P2.0
74
P2.1
73
P2.2
72
P2.3
71
P2.4
70
P2.5
69
P2.6
76
P2.7
75
P2.8
68
P2.9
67
P2.10
66
P2.11
65
P2.12
64
P2.13
63
P2.14
60
P2.15
59
P3.0
7
P3.1
6
P3.2
5
P3.3
132
P3.4
131
P3.5
130
P3.6
129
P3.7
14
P3.8
13
P3.9
12
P3.10
11
P3.11
10
P3.12
9
P3.13
8
P3.14
134
P3.15
133
P4.0
124
P4.1
123
P4.2
122
P4.3
121
P4.4
120
P4.5
119
P4.6
118
P4.7
117
P5.0
84
P5.1
83
P5.2
82
P5.3
81
P5.4
80
P5.5
79
P5.6
78
P5.7
77
P5.8
58
P5.9
57
P5.10
56
P5.11
55
P6.0
101
P6.1
100
P6.2
99
P6.3
98
P6.4
97
P6.5
96
P6.6
95
P14.0
42
P14.1
41
P14.2
40
P14.3
39
P14.4
38
P14.5
37
P14.6
36
P14.7
35
P14.8
52
P14.9
51
P14.12
34
P14.13
33
P14.14
32
P14.15
31
P15.2
30
P15.3
29
P15.4
28
P15.5
27
P15.6
26
P15.7
25
P15.8
54
P15.9
53
P15.12
50
P15.13
49
P15.14
44
P15.15
43
PORST#
91
RTC_XTAL_1
22
RTC_XTAL_2
23
TCK
93
TMS
92
USB_D+
16
USB_D-
15
VAGND
45
VAREF
46
VBAT
24
VBUS
17
VDDA
48
VDDC
19
VDDC1
61
VDDC2
90
VDDC3
125
VDDP
18
VDDP1
62
VDDP2
86
VDDP3
126
VSS
85
VSSA
47
VSSO
89
XTAL1
87
XTAL2
88
U300
A
1
B
2
EN
4
GND
3
VCC
5
U301
CLK
6
CS#
1
DI
5
DO
2
GND
4
HOLD#
7
VCC
8
WP#
3
U302
A
1
B
2
EN
4
GND
3
VCC
5
U303
A
1
B
2
EN
4
GND
3
VCC
5
U304
A
1
B
2
EN
4
GND
3
VCC
5
U305
A
1
B
2
EN
4
GND
3
VCC
5
U306
V300
+ -
PS
1
2
ON
1
2
3
4
5
6
7
8
A
B
C
D
E
8
7
6
5
4
3
2
1
E
D
C
B
A
CPU_45A-V3-2
05.11.2013 09:55:58
3/5
Sheet:
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
USB
Supply
Analog
Digital
Hibernate/RTC
(IO0)
(IO1)
(IO3)
(IO2)
CPU
PowerScale
Jumper closed with a cutable trace on bottom layer
CPU
COM Board Switch
Trace Signal / ACT Board Switch
qSPI FLASH
Boot Options
Hitex
Potentiometer, GPIO LED, I2C Pullups
BSL
OFF ON
CAN
UART
USIC0CH0
UART
Node1
CAN
P1.4
USIC_RxD
USIC_TxD
CAN_RxD
CAN_TxD
P1.5
V3 / 01.02.2012 / Ma
LED1