Index DW9937S, Service Manual

Page: 29 / 112

The I
2
C BUS is a BUS system developed by Philips for internal use in equipment. Data transmission is carried
out by the two SDA and SCL lines, in byte units, with the MSB first from start condition.
[Control Register]
The control register contains data sent from the master in order to determine the status of each switch.
The data format is set as shown in the figure above. The first 7 bits in the address byte are allocated to the
slave address, and the remaining 1 bit is allocated to the read/write bit. The read/write bit is set at 0 when
using as a control register.
The MM1313 slave address can be selected as 90H/92H depending on the status of the ADR pin. When ADR
pin is low it is 90H.
The relationship between the control register bits and switch control is as shown below.
The control register bits are reset to 0 when power is applied.
MM1313 control is carried out by the 3-byte structure of the 1 address byte and 2 control data bytes. The first
byte in the control data is control data for output 1, and the remaining 1 byte is control data for output 2.
All of the remaining data (fourth byte and after) are ignored.
Refer to the separate tables for details on switch control.
MITSUMI
I
2
C BUS Control 5-Input 2-Output AV Switch MM1313
I
2
C BUS
SDA
SCL
S
1 2 3 4 5 6 7 8 A 1 2 3 8 A P
S:Start Condition
P:Stop Condition
A:Acknowledge
Address byte Control data
S
Slave address R/W
1 0 0 1 0 0 0/1 0
A
Control register 1
b7 b6 b5 b4 b3 b2 b1 b0
A
Control register 2
b7 b6 b5 b4 b3 b2 b1 b0
A P
b7 b6 b5 b4 b3 b2 b1 b0
Audio S/Comp
Video-Select Audio-Select
Gain Select
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