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System BIOS Cacheable
Selecting Enabled allows caching of the system BIOS ROM at
F0000h-FFFFFh, resulting in better system performance. However, if
any program writes to this memory area, a system error may result.
The choice: Enabled, Disabled.
Video BIOS Cacheable
Select Enabled allows caching of the video BIOS , resulting in better
system performance. However, if any program writes to this memory
area, a system error may result.
The Choice: Enabled, Disabled.
Memory Hole At 15M-16M
You can reserve this area of system memory for ISA adapter ROM.
When this area is reserved, it cannot be cached. The user information
of peripherals that need to use this area of system memory usually
discusses their memory requirements.
The Choice: Enabled, Disabled.
CPU Latency Timer
Enabled :CPU cycle will only be Deferred after in has been in a
“Snoop Stall” for 31 clocks and another ADS# has arrived.
Disabled: CPU cycle will only be Deferred immediately after the
GMCH receives another ADS#.
The Choice: Enabled, Disabled.
Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support
delay transactions cycles. Select Enabled to support compliance with
PCI specification version 2.1.
The Choice: Enabled, Disabled.
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