Integrated Device Technology
Quick start ADC1410S, ADC1210S, ADC1010S series
Quick start
© IDT 2012. All rights reserved.
Quick start
Rev. 06
— 2 July 2012
19 of 27
3.2.5 Acquisition page
This page will acquire data to evaluate the high dynamic performance of the device:
Fig 13.
SW_ADC_1_r02: “Acquisition” page
Before proceeding to any acquisition, the user needs to do the following entries:
the sampling frequency Fs: 80 Msps in our example (field
);
the input frequency Fin: 175 MHz in our example for both ADC channels (field
);
the number of samples to be acquired 16384 in our example (field
);
indicate whether it is CMOS or LVDS DDR (field
);
pres
s the “INITIALIZATION” button
. It will initialized the HSDC-EXTMOD
board:
FPGA is ready (red LED is flashing ¼ on and ¾ off) ;
PLL embedded is locked (green LED is on);
indicate whether Fin or Fs are coherent or not (field
):
if signals are coherent, selected which Fin or Fs are fixed for the calculation
if signals are not coherent, select the window for FFT processing to apply (the
Blackman window gives better results).
press the “ACQUIRE” button
to display the results from the FFT processing.
The results fields
will be updated automatically depending on the display
choice using the “Display …” button (“Display ADC0” or “Display ADC1” or
“Display ADC0 & ADC1”).
press “STOP” button to stop acquisition;
field
allows to do FFT averaging over up to 255 trials, suitable for small signal
analysis;
