IDT 89HPES16T4G2, Preliminary User'S Manual

Page: 111 / 149

IDT Configuration Registers
PES16T4G2 User Manual 8 - 33 January 28, 2013
Notes
6 SDE RWL 0x0 Selectable De-emphasis. For switch downstream ports, this bit
sets the de-emphasis level when the link operates at 5.0 Gbps. For
the upstream port, this bit selects the de-emphasis preference
advertised via training sets (the actual de-emphasis on the link is
selected by the link partner).
0x0 - De-emphasis level = -6.0 dB
0x1 - De-emphasis level = -3.5 dB
This bit has no effect when the link operates at 2.5 Gbps, or when
the link operates in low-swing mode.
When this field is modified, the newly selected de-emphasis is not
applied until the PHY LTSSM transitions through the states in
which it is allowed to modify the de-emphasis setting on the line
(i.e., Recovery.Speed). Therefore, after modifying this field, it is
recommended that the link be fully retrained by setting the FLRET
bit in the PHYLSTATE0 register.
9:7 TM RW 0x0
Sticky
Transmit Margin. This field controls the value of the non de-
emphasized voltage level at the transmitter pins. This field is reset
to 0x0 on entry to the LTSSM Polling.Configuration substate.
0x0 - Normal operating range
0x1 - 900 mV for full swing and 500 mV for low-swing
0x2 - 700 mV for full swing and 400 mV for low-swing
0x3 - 500 mV for full swing and 300 mV for low-swing
0x4 - 300 mV for full swing and 200 mv for low-swing
0x5 - 200 mV for full swing and 100 mv for low-swing
0x6-0x7 - Reserved
This register is intended for debug, compliance testing purpose
only. System firmware and software is allowed to modify this regis-
ter only during debug or compliance testing. In all other cases, the
system must ensure that this register is set to the default value.
10 EMC RW 0x0
Sticky
Enter Modified Compliance. When this bit is set to 1b, the port
transmits the modified compliance pattern if the LTSSM enters
Polling.Compliance state.
This register is intended for debug, compliance testing purposes
only. System firmware and software is allowed to modify this regis-
ter only during debug or compliance testing. In all other cases, the
system must ensure that this register is set to the default value.
11 CSOS RW 0x0
Sticky
Compliance SOS. When set to 1b, the LTSSM is required to send
SOS periodically in between the modified compliance patterns.
12 CDE RW 0x0
Sticky
Compliance De-emphasis. This bit selects the de-emphasis
value in the Polling.Compliance state when this state was entered
as a result of setting the Enter Compliance (ECOMP) bit in this reg-
ister.
0x0 - 6.0 dB
0x1 - 3.5 dB
This bit is intended for debug, compliance testing purposes. Sys-
tem firmware and software is allowed to modify this bit only during
debug or compliance testing.
15:12 Reserved RO 0x0 Reserved field.
Bit
Field
Field
Name
Type Default
Value
Description