ICS SB586TCP/166, Product Manual

Page: 42 / 128

REQ64# (optional)
Request 64-bit Transfer, when actively driven by the current bus master,
indicates it desires to transfer data using 64 bits. REQ64# has the same timing
as FRAME#. REQ64# has meaning at the end of reset.
RST#
Reset is used to bring PCI-specific registers, sequencers and signals to a
consistent state.
SBO# (optional)
Snoop Backoff is an optional cache support pin which indicates a hit to a
modified line when asserted. When SBO# is deasserted and SDONE is
asserted, it indicates a "clean" snoop result.
SDONE (optional)
Snoop Done is an optional cache support pin which indicates the status of the
snoop for the current access. When deasserted, it indicates the result of the
snoop is still pending. When asserted, it indicates the snoop is complete.
SERR#
System Error is for reporting address parity errors, data parity errors on the
Special Cycle command, or any other system error where the result will be
catastrophic. If an agent does not want a non-maskable interrupt (NMI) to be
generated, a different reporting mechanism is required.
STOP#
Stop indicates that the current target is requesting the master to stop the
current transaction.
TCK (optional)
Test Clock is used to clock state information and test data into and out of the
device during operation of the TAP (Test Access Port).
TDI (optional)
Test Data Input is used to serially shift test data and test instructions into the
device during TAP (Test Access Port) operation.
TDO (optional)
Test Data Output is used to serially shift test data and test instructions out of
the device during TAP (Test Access Port) operation.
TMS (optional)
Test Mode Select is used to control the state of the TAP (Test Access Port)
controller in the device.
PCI REFERENCE
2-18 TECHNICAL REFERENCE