3.3.4 INT Mask Control Register
(Write): wBase+5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 0 0 0 0 0 EN1
EN0
Note. Refer to Sec. 3.1 for more information regarding wBase.
EN0 = 0
Æ
Disable INT0 as an interrupt signal (default)
EN0 = 1
Æ
Enable INT0 as an interrupt signal
EN1 = 0
Æ
Disable INT1 as an interrupt signal (default)
EN1 = 1
Æ
Enable INT1 as an interrupt signal
outportb(wBase+5,0);
/* Disable all interrupts */
outportb(wBase+5,1);
/* Enable the interrupt of INT0 */
outportb(wBase+5,2);
/* Enable the interrupt of INT1 */
outportb(wBase+5,3);
/* Enable both interrupt channels */
Refer to the following demo programs for more information:
DEMO3.C and DEMO4.C
Æ
single interrupt source
DEMO5.C and DEMO6.C
Æ
multiple interrupt source
3.3.5 Read Card ID Register
(Read): wBase+0xD4
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 0 0 0 ID3
ID2
ID1
ID0
Note. Refer to Sec. 3.1 for more information regarding wBase.
wCardID = inportb(wBase+0xD4);
/* Read Card ID(0x0~0x15) */
!
Note: The Card ID function is supported by the following models:
1.
PIO-DA4U/DA8U/DA16U (Ver. 1.1 or above)
2.
PISO-DA4U/DA8U/DA16U
PIO-DA/PISO-DA Series User Manual (Ver.2.9, Feb. 2011, PMH-009-29 )
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