4.2.3 Section 2
This section is used by the add-on control logic. 64 bytes of I/O locations are
used. Detailed descriptions are shown below.
4.2.3.1
The 8254 registers
The 8254, programmable timer/counter is used to generate periodic A/D trigger
signals, periodic interrupt signals and the machine- independent timer for PCI-
1002. Addresses 00h, 04h, 08h and 0Ch are used to control the 8254.
Timer 0 is used as Pacer 0. Timer 1 is used as Pacer 1. Timer 2 is used as a
machine-independent timer, P1002_Dealy(). For more details about the
programming information, please refer to Intel’s “Microsystem Components
Handbook”.
4.2.3.2
The DI / DO register
Address 20h is used for DI / DO ports. Writing to this port will write data to DO
register. Reading from this port will read the data from DI.
4.2.3.3
The A/D buffer
Address 30h is used for A/D buffer. Only read operations are available at this
address. Reading from this port will read the data from A/D buffer. The format of
A/D buffer is:
Bit15-12
Bit11-0
Analog input channel
A/D data
Bit 15-12:
The channel number of analog input. Only the lower 4 bits of the
channel number are shown in this register.
Bit 11-0:
The A/D data.
PCI-1002 Series User Manual (Ver.2.8, Oct. 2011, PMH-015-28)
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