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4-4 POWER SUPPLY CIRCUITS
4-4-1 VOLTAGE LINES (MAIN unit)
4-5 PORT ALLOCATIONS
4-5-1 CPU (FRONT unit; IC1)
CPU (IC1)—continued
4 - 4
Description
The voltage from a DC power supply.
The same voltage as the VCC line which is con-
trolled by the power switching circuit (Q14, Q15).
When the [POWER] switch is pushed, the CPU
outputs the “PWON” control signal to the power
switching circuit to turn the circuit ON.
Common 5 V for the CPU converted from the
VCC line by the CPU5V regulator circuit (IC3).
The circuit outputs the voltage regardless of the
power ON/OFF condition.
Common 8 V converted from the HV line by the
8V regulator circuit (IC2).
Common 5 V converted from the HV line by the
5V regulator circuit (Q12, Q13).
Receive 8 V controlled by the R8 regulator circuit
(Q10, Q11) using the “TXC” signal from the I/O
expander IC (IC13).
Transmit 8 V controlled by the T8 regulator circuit
(Q8, Q9) using the “TXC” signal from the I/O
expander IC (IC13).
Line
VCC
HV
CPU5V
8V
5V
R8
T8
Outputs RF attenuator control signal to
the attenuator switch (MAIN unit; Q1).
Low : While attenuator function is ON.
Input port for PLL unlock signal from
the PLL IC (MAIN unit; IC10).
High: During unlock.
Outputs control signal for the power
switching circuit (MAIN unit; Q14, Q15).
Outputs control signal for LCD back-
light.
Low : While LCD backlight is ON.
Input port for the PTT switch from the
external connector (MAIN unit; J5).
Low : External PTT switch is ON.
Input port for the LCD backlight control
signal from the external connector
(MAIN unit; J5).
Low : External dimmer switch is ON.
Outputs strobe signals for the PLL IC
(MAIN unit; IC10).
Outputs strobe signals for the level
controller IC (MAIN unit; IC12).
Outputs strobe signals for the I/O
expander IC (MAIN unit; IC13).
Output ports for the key matrix.
Input ports for the key matrix.
Outputs control signal for the beep
mute circuit (Q10).
High: Beep muted.
Output ports for the CTCSS/ DTCS sig-
nals.
Input port for the microphone hanger
detection signal.
Low : Microphone on hook
Output port
beep audio while receiving.
2/5 tone signals while transmitting.
Outputs DTMF signals.
Input port for the option connector state
(MAIN unit; J4).
Input port for the CTCSS/DTCS
decode signals.
Input port for S-meter signal.
Input port for PLL lock voltage.
Input port for the transceiver’s internal
temperature.
32
36
37
38
39
40
41
42
43
45, 46
47–50
51
52–54
55
90
91
94–96
97
98
99
100
RFATT
UNLK
PWON
DIM
EXTPTT
DIMIN
PLST
DAST
EXST
KS1, KS0
KR3–
KR0
BM
CTDA0–
CTDA2
HANG
MTONE
TONED
OPV3–
OPV1
CTCIN
SD
LVIN
TEMP
Pin
Port
Description
number
name
Input port for overvoltage detection
from the connected power supply.
Outputs clock signal to the EEPROM
(IC3), PLL IC (MAIN unit; IC10) and
expander ICs (MAIN unit; IC12, IC13),
etc.
Input port for the data signals from the
EEPROM (IC3), etc.
Outputs data signals to the EEPROM
(IC3), PLL IC (MAIN unit; IC10) and
expander ICs (MAIN unit; IC12, IC13),
etc.
Input port for the cloning signal.
Output port for the cloning signal.
Input for the POWER switch.
Low : While POWER switch is
pushed.
NOIS signal input port from the FM IF
IC (MAIN unit; IC1) for noise squelch
operation.
Input port for the PTT switch.
Low : While PTT switch is pushed.
1
12
13
14
16
17
18
19
26
VIN
SCK
SI
SO
CLIN
CLOUT
POSW
NOIS
PTT
Pin
Port
Description
number
name