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4 - 6
PIN
No.
LINE
NAME
DESCRIPTION
IN/
OUT
STATUS
CONDITION
3
PCON
Transceiver power control.
OUT
H
While the transceiver power is
ON.
4
AFMUTE
AF mute signal to the AF mute SW (LOGIC UNIT: Q403, 404).
OUT
H
AF mute.
5
MUTE
TX mute signal.
OUT
H
TX mute.
6
MICC
MIC AMP (LOGIC UNIT: Q304) control signal to the MIC AMP controller
(LOGI UNIT: Q302).
OUT
L
MIC AMP is activated.
7
AFON
Control signal to the AF power AMP controller (LOGIC UNIT: Q400–402).
OUT
H
AF power AMP (L: IC400) is
activated (Squelch open).
9
BATT
Power supply select signal to the power supply selector (LOGIC UNIT:
IC1000).
OUT
H/L
H= Operated by the batter y
pack.
L= Operated by an exter nal
power source.
10,
11
MIC1, MIC2
MIC gain control signals to the MIC gain controller (LOGIC UNIT: Q303).
OUT
–
–
12
ACQ
ACQ signal to the modem (LOGIC UNIT: IC501).
OUT
H
Synchronized.
14
RXDT
RX data to the modem (LOGIC UNIT: IC501).
IN
–
–
15
TXDT
TX data to the modem (LOGIC UNIT: IC501).
OUT
–
–
16
AMBEC
DSP IC power line regulator (LOGIC: IC508) control signal.
OUT
H
In DV mode operation.
18
DVC
Liner CODEC IC power line regulator (LOGIC UNIT: Q503, 504) control
signal.
OUT
H
In DV mode operation.
20
PTT
[PTT] key input. (Pull-down)
IN
H
The key is pushed.
21
DASTB2
Strobe signal to the DAC (MAIN UNIT: IC600).
OUT
–
–
26
BTDET
Battery attach detect.
IN
L
A battery is attached.
27
RXCK
RX clock to the modem (LOGIC UNIT: IC501).
IN
–
–
28
TXCK
TX clock to the modem (LOGIC UNIT: IC501).
IN
–
–
34
LINH
LCD driver (LOGIC UNIT: IC603) chip-enable signal.
OUT
L
LCD display OFF.
35
LCE
Strobe signal to the LCD driver (LOGIC UNIT: IC603).
OUT
–
–
36
LDI
Serial data to the LCD driver (LOGIC UNIT: IC603).
OUT
–
–
37
LCL
Clock to the LCD driver (LOGIC UNIT: IC603).
OUT
–
–
38
BLED
[BUSY] LED driver (LOGIC UNIT: Q201) control signal.
OUT
H
W h i l e r e c e i v i n g ( S q u e l c h
open).
39
TXLED
TX LED control signal.
OUT
H
Lights ON. (While transmitting)
40
LLIGHT
LCD backlight control signal.
OUT
L
Backlight ON.
41
KLIGHT
LCD/Key backlight driver (LOGIC UNIT: Q201) control signal.
OUT
L
Lights ON.
42
AMBECLK
AMBE clock signal to the DSP CODEC IC (LOGIC UNIT: IC506).
OUT
–
–
43
AMBERXD
AMBE RX data to the DSP CODEC IC (LOGIC UNIT: IC506).
IN
–
–
44
AMBETXD
AMBE TX data to the DSP CODEC IC (LOGIC UNIT: IC506).
OUT
–
–
45
AMBESTB
AMBE strobe signal to the DSP CODEC IC (LOGIC UNIT: IC506).
OUT
–
–
46
NOIS
Noise detect signal from the IF IC (MAIN UNIT: IC100).
IN
–
–
47
AMBERES
Reset signal to the liner CODEC IC and DSP CODEC IC (LOGIC UNIT:
IC503 and IC506).
OUT
–
–
49
AMBEEPR
AMBEEPR signal to the DSP CODEC IC (LOGIC UNIT: IC506).
IN
–
–
50
DTCS
Tone fi lter response switching signal.
OUT
H
DTCS signals is in use.
51–
55
KR0–KR4
Key detect signal.
(Pushed button is detected according to the input voltage.)
IN
–
–
56
SQL
[SQL] key input. (Pull-up)
IN
L
The key is pushed.
57
DIUD
[DIAL] input (Phase B).
IN
–
–
59
DICK
[DIAL] input (Phase A).
IN
–
–
61–
64
KS0–KS3
Key matrix ports.
OUT
–
–
69
IOSTB
Strobe signal to the expander (RF UNIT: IC951).
OUT
–
–
70
IOSTB1
Strobe signal to the expanders (MAIN UNIT: IC701, 702).
OUT
–
–
71
IOEN
Output enable signal to the expanders (MAIN UNIT: IC701, 702).
OUT
–
–
72
DASTB1
Strobe signal to the DAC (RF UNIT: IC950).
OUT
–
–
73
PLLSTB
Strobe signal to the PLL IC (MAIN UNIT: IC800).
OUT
–
–
74
DATA
Common serial data to the PLL ICs and DAC (LMX2313/ME15E03SL/
M62352AGP).
OUT
–
–
75
CK
Common clock signal to the the PLL ICs and DAC (LMX2313/
ME15E03SL/M62352AGP).
OUT
–
–
4-4 CPU (LOGIC UNIT: IC1) PORT ALLOCATION