preliminary
preliminary
iC-PVS
LINEAR/OFF-AXIS
BATTERY-BUFFERED ABSOLUTE POSITION HALL SENSOR
Rev A2, Page 5/51
PACKAGING INFORMATION
PIN CONFIGURATION QFN38 5 x 7 mm
²
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
<D-CODE>
<A-CODE>
<P-CODE>
PIN FUNCTIONS
No. Name
Function
1 GPIO3 General Purpose I/O 3
2 GPIO2 General Purpose I/O 2
3 GPIO1 General Purpose I/O 1
4 GPIO0 General Purpose I/O 0
5 n.c.
Pins marked n.c. are not connected
6 n.c.
7 n.c.
8 n.c.
9 n.c.
10 NWRN Battery Early Warning (active low)
11 NCS
SPI Not Chip Select
12 SI
Serial Interface, Slave In
13 CLK
Serial Interface, Clock Line
14 SO
Serial Interface, Slave Out
15 PRE
Preset Trigger Input
16 GND
Ground
17 SCL
I
2
C Interface, Clock Line
18 SDA
I
2
C Interface, Data Line
19 NERR
Error Output (active low)
20 n.c.
21 n.c.
22 n.c.
23 n.c.
24 n.c.
25 n.c.
26 n.c.
27 n.c.
28 n.c.
29 n.c.
30 n.c.
31 n.c.
32 NCOS
Analog Output Negative Cosine
33 PCOS
Analog Output Positive Cosine
34 NSIN
Analog Output Negative Sine
35 PSIN
Analog Output Positive Sine
36 VDD
+3.15V to 5.5V Main Supply Voltage
37 VDDS
1
Switched Supply Voltage Output
38 VBAT
2
Battery Supply Voltage Input (typ.
3.6 V)
BP
3
Backside Paddle
IC top marking: <P-CODE> = product code, <A-CODE> = assembly code (subject to changes), <D-CODE> = date code (subject to changes); dashed lines are
used for visible or hidden outlines.
1
Connect bypass capacitor according to Elec. Char. 011. The output must not be further loaded.
2
Do not leave pin open. Connect pin to VDD if iC-PVS is used without a backup power source (e.g. battery, supercap).
3
To improve the heat dissipation connect the backside paddle to an extended copper area connected to GND. Avoid any current flow across the paddle.
The heat distribution can be supported by connecting further PCB layers using
thermal vias
. If those need to be placed below the paddle, prefer blind vias.