![IBM Novell 10 SP1 EAL4 Design Manual Download Page 106](http://html1.mh-extra.com/html/ibm/novell-10-sp1-eal4/novell-10-sp1-eal4_design-manual_4190246106.webp)
•
0 The processor is not in hypervisor state.
•
1 If MSRPR= 0 the processor is in hypervisor state; otherwise, the processor is not in hypervisor
state.
The hypervisor takes the value of 1 for hypervisor mode and 0 for user and supervisor mode. The following
table describes the privilege state of the processor as determined by MSR [HV] and MSR [PR] as follows:
HV
PR
Privilege State
0
0
privileged(supervisor mode)
0
1
problem (user mode)
1
0
privileged and hypervisor
1
1
Problem(user mode)
94
Summary of Contents for Novell 10 SP1 EAL4
Page 1: ...SUSE Linux Enterprise Server 10 SP1 EAL4 High Level Design Version 1 2 1...
Page 23: ...11...
Page 29: ...17...
Page 43: ...31...
Page 54: ...42 Figure 5 8 New data blocks are allocated and initialized for an ext3 field...
Page 117: ...105 Figure 5 48 Page Address Translation and access control...
Page 125: ...113 Figure 5 54 31 bit Dynamic Address Translation with page table protection...
Page 126: ...114 Figure 5 55 64 bit Dynamic Address Translation with page table protection...
Page 172: ...160 Figure 5 79 System x SLES boot sequence...
Page 214: ...202...