ADDRESSING SYSTEM BOARD COMPONENTS
This section provides more details of how the BIOS uses the system board components
mentioned in the I/O port list.
DMA Channel Controllers
Only “I/O-to-memory” and “memory-to-I/O” transfers are allowed.“I/O-to-I/O” and “memory-to-
memory” transfers are disallowed by the hardware configuration.
The system controller supports seven DMA channels, each with a pageregister used to extend
the addressing range of the channel to 16 MB. The following table summarizes how the DMA
channels are allocated.
First DMA controller (used for 8-bit transfers)
Channel
Function
0
Available
1
Available or ECP mode for parallel port
2
Flexible disk I/O
3
Available or ECP mode for parallel port
Second DMA controller (used for 16-bit transfers)
Channel
Function
4
Cascade from first DMA controller
5-6
Available
6-7
Available
Interrupt Controllers
The system has two 8259A compatible interrupt controllers. They are arranged as a master
interrupt controller and a slave that is cascaded through the master.
The following table shows how the master and slave controllers are connected. The Interrupt
Requests (IRQ) are numbered sequentially, starting with the master controller, and followed by
the slave.
IRQ (Interrupt Vector)
Interrupt Request Description
IRQ0(08h)
System timer
IRQ1(09h)
Keyboard controller
IRQ2(0Ah)
Slave IRQ
Cascade connection from INTC2 (Interrupt Controller 2)
IRQ8(70h)
Real time clock
IRQ9(71h)
Available for PCI accessory boards, if not used by ISA boards
IRQ10(72h)
Available for PCI accessory boards, if not used by ISA boards
IRQ11(73h)
Available for PCI accessory boards, if not used by ISA boards
IRQ12(74h)
Mouse
IRQ13(75h)
Pentium
IRQ14(76h)
Primary channel of IDE controller
IRQ15(77h)
Free, if not used by secondary channel of IDE controller
IRQ3(0Bh)
Free, if not used for serial port
IRQ4(0Ch)
Free, if not used for serial port
