If the
Setup field has been set to automatic, the logical block addressing (LBA) mode will be
selected for each device that supports it.
Operated in SLAVE mode, the IDE controller saturates the PCI bus with transfers, thus limiting
the actual achieved transfer rate to around 7 MBytes per second. Operated in MASTER mode,
though, the IDE controller is allowed to work autonomously of the CPU, and the full 22 MBytes
per second transfer rate can be achieved, with less than 33% occupancy of the PCI bus (so
allowing the CPU to get on with other work for more than 67% of the cycle times, whilst the IDE
transfers are going on in parallel).
OTHER PCI ACCESSORY DEVICES
PCI accessory boards are used for high-speed peripheral accessories. There are three slots on
the PCI bus for accessory boards. One of these is already occupied by the Enhanced Ethernet
10 BaseT Network board (which is described in the next chapter), and another is a combination
slot with the ISA bus.
Plug and Play
Plug and Play is an industry standard for automatically configuring the PC’s hardware. When
you start the PC, the Plug and Play system BIOS can detect automatically which hardware
resources (IRQs, DMAs, memory ranges, and I/O addresses) are used by the system-based
components.
The
HP Vectra XM 5/xx series 4 PC has a “PnP level 1.0A” BIOS and meets the “Windows 95
Required” level for Plug and Play. Accessory boards which are Plug and Play are automatically
configured by the BIOS (Windows 3.11) or by the operating system (Windows 95).
DEVICES ON THE ISA BUS
The PCI/ISA Bridge chip (otherwise known as PIIX, or as the system I/O chip, SIO-A) is an Intel
82371FB. It is responsible for transferring data between the PCI bus and the ISA expansion
bus.
As the ISA bus controller, the chip supports asynchronous ISA bus operation up to 16 MHz. It
integrates: two 82C37A DMA controllers, two 82C59A interrupt controllers, an 82C54 timer, a
hidden ISA refresh controller, support for the BIOS, data buffers to isolate the PCI and ISA
buses, and NMI control logic. It also contains the two-channel PCI IDE controller.
When transferring data to or from the PCI bus (either as PCI master or PCI slave), fast positive
decode is achieve through the use of programmable memory regions. For unclaimed PCI
cycles, subtractive decoding is used. The chip supports PCI-to-ISA posted memory writes, and
implements PCI address/data parity generation and checking. The chip translates DMA
transfers for PCI slaves.
The ISA bus handles the following devices:
•
Super I/O controller, containing the following:
•
serial / parallel communications ports
•
flexible drive controller (FDC)
•
real time clock (RTC) and CMOS memory
•
keyboard and mouse controller
• serial
EEPROM
• System
ROM
•
other ISA accessory devices.
