1. HP E1499A V/382 Controller with READIO and WRITEIO (register
access is from VXI backplane).
2. E1300/01 IBASIC absolute addressing with READIO and WRITEIO
(register access is from VXI backplane).
3. E1300/01 IBASIC select code 8 with READIO and WRITEIO
(register access is from VXI backplane).
4. External Computer using DIAG:PEEK? and DIAG:POKE (register
access is over HP-IB).
5. External Computer using VXI:READ? and VXI:WRITE (register
access is over HP-IB).
Table B-1. Computer Configurations used with the HP E1346A.
Computer
Programming Method
Base Address
E1300/E1301 IBASIC
(Absolute Addressing)
(Select Code 8)
ReadIO (-9826, Basoffset)
WRITEIO -9826, Basoffset: data
(positive select code =byte read or write
negative select code =word read or write)
READIO (8, Basreg number)
WRITEIO 8, Basreg number; data
Base_addr =1FC000
16
+(LADDR *64)
16
or
=2,080,768 +(LADDR *64)
offset =register offset (Figure B-1)
Base_addr =LADDR * 256
reg number =offset (Figure B-1)/2
External Computer
(over HP-IB to E1300/1301 Mainframe or
E1406 Command Module)
VXI:READ? logical_address, offset
VXI:WRITE logical_address, offset, data
DIAG:PEEK? Basoffset, width
DIAG:POKE Basoffset, width,
data
logical address setting (LADDR)
offset =register offset (FIgure B-1)
Base_addr =1FC000
16
+(LADDR
*64)
16
or
= 2,080,768 +(LADDR *64)
offset =register offset (Figure B-1)
V/382 Embedded Computer
(C-Size system)
READIO (-16, Basoffset)
WRITEIO -16, Basoffset; data
(positive select code =byte read or write
negative select code =word read or write)
Base_addr =C000
16
+(LADDR *64)
16
or
=49,152 +(LADDR *64)
offset =register offset (Figure B-2)
LADDR : logical address.
(LADDR *64)
16
: multiply quantity, then convert to a hexadecimal number (e.g., 80 *64)
16
=1400
16
.
When using DIAG:PEEK? and DIAG:POKE, the width (number of bits) is 8 or 16.
Appendix B
HP E1346A Multiplexer Registers 65
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