Rev. 1.20
26
November 20, 2019
Rev. 1.20
27
November 20, 2019
HT66F2740
12V High Current Flash MCU
HT66F2740
12V High Current Flash MCU
Look-up Table
Any location within the Program Memory can be defined as a look-up table where programmers can
store fixed data. To use the look-up table, the table pointer must first be setup by placing the address
of the look up data to be retrieved in the table pointer registers, TBLP and TBHP. These registers
define the total address of the look-up table.
After setting up the table pointer, the table data can be retrieved from the Program Memory using the
corresponding table read instruction such as “TABRD [m]” or “TABRDL [m]” respectively when
the memory [m] is located in sector 0. If the memory [m] is located in other sectors, the data can be
retrieved from the program memory using the corresponding extended table read instruction such as
“LTABRD [m]” or “LTABRDL [m]” respectively. When the instruction is executed, the lower order
table byte from the Program Memory will be transferred to the user defined Data Memory register [m]
as specified in the instruction. The higher order table data byte from the Program Memory will be
transferred to the TBLH special register. Any unused bits in this transferred higher order byte will be
read as “0”.
The accompanying diagram illustrates the addressing data flow of the look-up table.
Last Page or
TBHP Register
Address
TBLP Register
Data
16 bits
Program Memory
Register TBLH
User Selected
Register
High Byte
Low Byte
Table Program Example
The following example shows how the table pointer and table data is defined and retrieved from the
microcontroller. This example uses raw table data located in the Program Memory which is stored
there using the ORG statement. The value at this ORG statement is “0F00H” which refers to the start
address of the last page within the 4K words Program Memory of the device. The table pointer low
byte register is setup here to have an initial value of “06H”. This will ensure that the first data read
from the data table will be at the Program Memory address “0F06H” or 6 locations after the start of
the last page. Note that the value for the table pointer is referenced to the specific address pointed by
the TBLP and TBHP registers if the “TABRD [m]” or “LTABRD [m]” instruction is being used. The
high byte of the table data which in this case is equal to zero will be transferred to the TBLH register
automatically when the “TABRD [m]” or “LTABRD [m]” instruction is executed.
Because the TBLH register is a read/write register and can be restored, care should be taken
to ensure its protection if both the main routine and Interrupt Service Routine use table read
instructions. If using the table read instructions, the Interrupt Service Routines may change the
value of the TBLH and subsequently cause errors if used again by the main routine. As a rule it is
recommended that simultaneous use of the table read instructions should be avoided. However, in
situations where simultaneous use cannot be avoided, the interrupts should be disabled prior to the
execution of any main routine table-read instructions. Note that all table related instructions require
two instruction cycles to complete their operation.