Holtek HT45F6530, Manual

Page: 66 / 119

Rev. 1.00 66 August 29, 2018 Rev. 1.00 67 August 29, 2018
HT45F6530
AC Voltage Regulator Flash MCU
HT45F6530
AC Voltage Regulator Flash MCU
• CTMnDH Register
Bit 7 6 5 4 3 2 1 0
Name — — — — — — D9 D8
R/W — — — — — — R R
POR — — — — — — 0 0
Bit 7~2 Unimplemented, read as “0”
Bit 1~0 D9~D8 : CTMn Counter High Byte Register bit 1~bit 0
CTMn 10-bit Counter bit 9~bit 8
• CTMnAL Register
Bit 7 6 5 4 3 2 1 0
Name D7 D6 D5 D4 D3 D2 D1 D0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit 7~0 D7~D0 : CTMn CCRA Low Byte Register bit 7~bit 0
CTMn 10-bit CCRA bit 7~bit 0
• CTMnAH Register
Bit 7 6 5 4 3 2 1 0
Name — — — — — — D9 D8
R/W — — — — — — R/W R/W
POR — — — — — — 0 0
Bit 7~2 Unimplemented, read as “0”
Bit 1~0 D9~D8 : CTMn CCRA High Byte Register bit 7~bit 0
CTMn 10-bit CCRA bit 9~bit 8
Compact Type TM Operation Modes
The Compact Type TM can operate in one of three operating modes, Compare Match Output Mode,
PWM Output Mode or Timer/Counter Mode. The operating mode is selected using the CTnM1 and
CTnM0 bits in the CTMnC1 register.
Compare Match Output Mode
To select this mode, bits CTnM1 and CTnM0 in the CTMnC1 register, should be set to 00
respectively. In this mode once the counter is enabled and running it can be cleared by three
methods. These are a counter overflow, a compare match from Comparator A and a compare match
from Comparator P. When the CTnCCLR bit is low, there are two ways in which the counter can be
cleared. One is when a compare match from Comparator P, the other is when the CCRP bits are all
zero which allows the counter to overflow. Here both CTMnAF and CTMnPF interrupt request flags
for Comparator A and Comparator P respectively, will both be generated.
If the CTnCCLR bit in the CTMnC1 register is high then the counter will be cleared when a compare
match occurs from Comparator A. However, here only the CTMnAF interrupt request flag will be
generated even if the value of the CCRP bits is less than that of the CCRA registers. Therefore when
CTnCCLR is high no CTMnPF interrupt request flag will be generated. If the CCRA bits are all
zero, the counter will overflow when it reaches its maximum 10-bit, 3FF Hex, value. However, here
the CTMnAF interrupt request flag will not be generated.
As the name of the mode suggests, after a comparison is made, the CTMn output pin, will change
state. The CTMn output pin condition however only changes state when a CTMnAF interrupt
request flag is generated after a compare match occurs from Comparator A. The CTMnPF interrupt