Rev. 1.00
60
August 29, 2018
Rev. 1.00
61
August 29, 2018
HT45F6530
AC Voltage Regulator Flash MCU
HT45F6530
AC Voltage Regulator Flash MCU
TM Clock Source
The clock source which drives the main counter in each TM can originate from various sources.
The selection of the required clock source is implemented using the CTnCK2~CTnCK0 bits in the
CTMn control registers, where n stands for the TM serial number. The clock source can be a ratio of
the system clock f
SYS
or the internal high clock f
H
, the f
SUB
clock source or the external CTCKn pin.
The CTCKn pin clock source is used to allow an external signal to drive the TM as an external clock
source or for event counting.
TM Interrupts
Each Compact type TM has two internal interrupts, the internal comparator A or comparator P,
which generate a TM interrupt when a compare match condition occurs. When a TM interrupt is
generated, it can be used to clear the counter and also to change the state of the TM output pin.
TM External Pins
Each Compact type TM has one TM input pin, with the label CTCKn. The CTMn input pin,
CTCKn, is essentially a clock source for the CTMn and is selected using the CTnCK2~CTnCK0
bits in the CTMnC0 register. This external TM input pin allows an external clock source to drive the
internal TM. The CTCKn input pin can be chosen to have either a rising or falling active edge.
The TMs each have two output pins with the label CTPn and CTPnB. When the TM is in the
Compare Match Output Mode, these pins can be controlled by the TM to switch to a high or low
level or to toggle when a compare match situation occurs. The external CTPn and CTPnB output
pins are also the pins where the TM generates the PWM output waveform.
As the TM input and output pins are pin-shared with other functions, the TM input and output
function must first be setup using relevant pin-shared function selection register described in the
Pin-shared Function section.
CTM0
CTM1
Input
Output
Input
Output
CTCK0
CTP0, CTP0B
CTCK1
CTP1, CTP1B
CTM External Pins
CTMn
CTCKn
CTPn
CCR output
CTPnB
Clock input
CTM Function Pin Block Diagram (n=0~1)
Programming Considerations
The TM Counter Registers and the Capture/Compare CCRA registers, all have a low and high byte
structure. The high bytes can be directly accessed, but as the low bytes can only be accessed via an
internal 8-bit buffer, reading or writing to these register pairs must be carried out in a specific way.
The important point to note is that data transfer to and from the 8-bit buffer and its related low byte
only takes place when a write or read operation to its corresponding high byte is executed.
As the CCRA registers are implemented in the way shown in the following diagram and accessing
