Architecture
19
iPC-I 320 Manual, Version 2.8
4.1.3 Reset of the µC from the PC
By writing a defined value (reset value) in a random address of the memory
range from 1400h to 17FFh, a reset of the microcontroller is triggered on the
interface. The value written in the memory cell states in which memory
architecture the interface should be switched after the reset. If the DIP switch 8
(SW1-8) is set to ON, there is no toggle of the memory architecture. The
interface then always remains in the loader mode and executes the program
contained in the EPROM. The following table shows the reset bit patterns for
the toggle. X means irrelevant:
Mode
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
Loader/application
X
X
X
X
X
X
X
0
Harvard
X
X
X
X
X
X
0
1
von-Neumann
X
X
X
X
X
X
1
1
4.1.4 Triggering the Interrupt on the µC through the PC
By writing a random value in a memory address in the range from 1800H to
1BFFh, an interrupt is triggered on the input INT2 of the microcontroller.
4.2 µC-side Memory Assignment
The interface can be operated in 3 different memory modes:
•
Loader/application-mode (EPROM as code memory, RAM as data
memory)
•
Von-Neumann-mode (common code and data memory in the RAM)
•
Harvard-mode (separate code and data memory in the RAM)
After switching on, the interface is always in the loader-mode. In this mode the
program contained in the EPROM on the interface is executed.
Summary of Contents for Ixxat iPC-I 320
Page 1: ...iPC I 320 Intelligent PC CAN Interface HARDWARE MANUAL ENGLISH...
Page 6: ...Introduction 6 iPC I 320 Manual Version 2 8 1 3 Block Diagram...
Page 9: ...Configuration 9 iPC I 320 Manual Version 2 8 Fig 3 2 iPC I 320 interface for ISA slot bus...
Page 10: ...Configuration 10 iPC I 320 Manual Version 2 8 Fig 3 3 iPC I 320 AT ISA96 interface...
