Introduction
4/82
1
Introduction
1.1
About this document
1.1.1
Description of the contents
This document describes the hardware of the
NXHX 90-JTAG
development
board.
1.1.2
List of revisions
Index
Date
Revision
1
2017-06-22
Document created
2
2018-11-15
Document revised according to hardware revision 3
3
2019-01-08
Caption of table 30 on page 37 changed from “
Pinning host
interface of NXHX-SDRSPI device
” (typo) to “
Pinning host
interface of NXHX-SDRSPM device
”
Table 1: List of revisions
1.1.3
Conventions in this document
# means active low signal
Notes are marked as follows:
Important:
<Important note>
Note:
<Simple note>
<Note, where to find further information>
1.1.4
Reference to hardware
Hardware
Revision
Part number
NXHX 90-JTAG
3
7833.000
Table 2: Reference to hardware
NXHX 90-JTAG | Device description
DOC170202HW03EN | Revision 3 | English | 2019-01 | Released | Public
© Hilscher 2019