C11440-22CU/C11440-22CU01 Instruction manual_Ver.1.4
(3) Camera Link bit assignments
28 bit solution
pin name
Port
Plug No.1,
Channel Link X
Port
Plug No.2,
Channel Link Y
Port
Plug No.3,
Channel Link Z
TxIN0
Port A0
D0_0
Port D2
D1_10
Port G5
D3_5
TxIN1
Port A1
D0_1
Port D3
D1_11
Port G6
D3_6
TxIN2
Port A2
D0_2
Port D4
D1_12
Port G7
D3_7
TxIN3
Port A3
D0_3
Port D5
D1_13
Port H0
D3_8
TxIN4
Port A4
D0_4
Port D6
D1_14
Port H1
D3_9
TxIN5
Port A5
D0_5
Port D7
D1_15 (MSB)
Port H2
D3_10
TxIN6
Port A6
D0_6
Port E0
D2_0
Port H3
D3_11
TxIN7
Port A7
D0_7
Port E1
D2_1
Port H4
D3_12
TxIN8
Port B0
D0_8
Port E2
D2_2
Port H5
D3_13
TxIN9
Port B1
D0_9
Port E3
D2_3
Port H6
D3_14
TxIN10
Port B2
D0_10
Port E4
D2_4
Port H7
D3_15 (MSB)
TxIN11
Port B3
D0_11
Port E5
D2_5
Port I0
D4_0
TxIN12
Port B4
D0_12
Port E6
D2_6
Port I1
D4_1
TxIN13
Port B5
D0_13
Port E7
D2_7
Port I2
D4_2
TxIN14
Port B6
D0_14
Port F0
D2_8
Port I3
D4_3
TxIN15
Port B7
D0_15 (MSB)
Port F1
D2_9
Port I4
D4_4
TxIN16
Port C0
D1_0
Port F2
D2_10
Port I5
D4_5
TxIN17
Port C1
D1_1
Port F3
D2_11
Port I6
D4_6
TxIN18
Port C2
D1_2
Port F4
D2_12
Port I7
D4_7
TxIN19
Port C3
D1_3
Port F5
D2_13
Port J0
D4_8
TxIN20
Port C4
D1_4
Port F6
D2_14
Port J1
D4_9
TxIN21
Port C5
D1_5
Port F7
D2_15 (MSB)
Port J2
D4_10
TxIN22
Port C6
D1_6
Port G0
D3_0
Port J3
D4_11
TxIN23
Port C7
D1_7
Port G1
D3_1
Port J4
D4_12
TxIN24
LVAL
LVAL
Port G2
D3_2
Port J5
D4_13
TxIN25
FVAL
FVAL
Port G3
D3_3
Port J6
D4_14
TxIN26
Port D0
D1_8
Port G4
D3_4
Port J7
D4_15 (MSB)
TxIN27
Port D1
D1_9
LVAL
LVAL
LVAL
LVAL
TxCLKIn
PClk
Pixel Clock
A,B,C
PClk
Pixel Clock D,E,F
PClk
Pixel Clock
G,H,I,J
LVAL
(Line Valid signal)
This signal show the period during which the line part of the image data from
FL-400 is in effect.
This is “ON” when during the period the line is active.
FVAL
(Frame Valid signal)
This signal shows the period during which the vertical part of the image data from
FL-400 is in effect. This is “ON” during the period the frame is active.
D0_0 to D4_15
(Digital image data)
This is the image signal data from FL-400 converted A/D.
”D0 to D4” has 16 bit data in each. MSB shows the most significant bit.
Please see 14-4-2 [OUTPUT TIMING SPECIFICATIONS] for details.
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