GRUNDIG Service
Chassis SG
2 -
Chassis - COFDM
IF_AGC
IF_D-
IF_D+
SDA_COFDM
SCL_COFDM
R
S
T
_
C
O
F
D
M
TS_COFDM_D7
TS_COFDM_D6
TS_COFDM_D5
TS_COFDM_D4
TS_COFDM_D1
TS_COFDM_D0
TS_COFDM_D3
TS_COFDM_D2
TS_COFDM_STRT
TS_COFDM_ERR
TS_COFDM_CLK
TS_COFDM_VLD
SCL_EMMA
SDA_EMMA
SCCVBS_MUTE
3V3_SW
3V3D_COFDM
3V3A_COFDM
1V2_SW
1V2D_COFDM
1V2D_COFDM
3V3D_COFDM
1V2D_COFDM
3V3D_COFDM
1V2D_COFDM
3V3D_COFDM
1V2D_COFDM
3V3D_COFDM
1V2D_COFDM
1V2_SW
3V3A_COFDM
3V3A_COFDM
5V_IF
R631 1k/603
C606
100nF
C616
100nF
C604
100nF
C635
470nF/10V
R625
4.7k/603
C600
33pF/50V
L601
1uH/805
L
6
0
0
6
0
0
R
B
e
a
d
0
6
0
3
RN600
A33R
1
3
5
7
2
4
6
8
R662
33R
C660
NC(10pF)
U600
CXD1968
R
F
_
IF
A
G
C
_
Q
1
IF
A
G
C
_
I
2
C
V
S
S
-0
3
C
V
D
D
-0
4
IN
T
R
P
T
N
5
R
E
S
E
T
N
6
T
S
E
R
R
7
T
S
S
Y
N
C
8
T
S
V
A
L
ID
9
T
S
C
L
K
1
0
D
V
S
S
-0
11
D
V
D
D
-0
1
2
T
S
D
A
T
A
0
1
3
T
S
D
A
T
A
1
1
4
C
V
D
D
-1
1
5
C
V
S
S
-1
1
6
TUNERCLK
64
TSDATA2
17
TSDATA3
18
TSDATA4
19
TSDATA5
20
TSDATA6
21
TSDATA7
22
DVSS-1
23
DVDD-1
24
SCL
25
SDA
26
CVDD-2
27
CVSS-2
28
TCLK
29
TDO
30
TDI
31
TMS
32
T
E
S
T
M
O
D
E
3
3
T
R
S
T
N
3
4
A
0
3
5
D
V
D
D
-2
3
6
D
V
S
S
-2
3
7
C
V
S
S
-3
3
8
C
V
D
D
-3
3
9
O
S
C
N
4
0
X
V
D
D
4
1
X
T
A
L
I
4
2
X
T
A
L
O
4
3
X
V
S
S
4
4
D
IV
D
D
4
5
D
IV
S
S
4
6
P
A
D
V
S
S
4
7
P
A
D
V
D
D
4
8
AINP_Q
49
AINM_Q
50
AVDD-0
51
AVSS-0
52
GUARD_Q
53
DAREFP
54
DAREFM
55
GUARD_I
56
AINM_I
57
AIN_I
58
AVSS-1
59
AVDD-1
60
REFIN
61
REFOUT
62
TUNERDAT
63
C630
100nF
R
6
0
0
1
0
0
R
R660
33R
R601
2.2Meg
C608
1uF/10V
C613
1uF/10V
R611
10k
L604
600R Bead 0603
R616
100R
C632
100nF/50V
Y600
20.48MHz
R602
10k
C618
NC(82pF/50V)
R668 2.2k
C615
100nF
R615
100R
C634
100nF
L605
NC(680nH)
C605
100nF
C619
100nF
C621
100nF
R633
33R
C624
1nF/50V
L602
1uH/805
C602
1uF/10V
C662
100nF
C603
100nF
RN601
A33R
1
3
5
7
2
4
6
8
C636
100nF
R669
100R
C620
1nF/50V
C633
100nF
C607
100nF
C601
33pF/50V
R626
4.7k/603
R670
100R
C626
NC(82pF/50V)
R661
33R
FFT Window
Position
Zero IF, Low IF
or High IF Input
Device Configuration
2K/8K FFT
Channel
Estimation &
Correction
MPEG2-TS
Interfaces
(Parallel &
Serial)
Power
Estimation
(AGC)
Power
Estimation
(AGC)
TPS Cell Decode & Frame
Synchronization
Symbol
deinterleave,
Demapper,
Bit deinterleavel
10/12-bit
IF AGC
PWM
10/12-bit
IF AGC
PWM
Pilot
Processing
Hi Priority/
Lo Priority
Stream Select
IFAGC_I
I
2
C Interface
and
Quiet I
2
C
Configuration
and Debug/
Monitor
Registers
Clock & Test,
JTAG
AINP_I
A/D
10-bit
A/D
10-bit
Forward Error
Correction ("FEC")
CXD1968AR COFDM Demodulator
SD
A
SC
L
XTAL
I
XTAL
O
RESETN
TM
S
TC
K
TD
I
TD
O
TRST
N
INTRPT
N
TUNERDAT
Quiet I
2
C
10-bit RF
AGC PWM &
GPO
Symbol
Resampling
ACI & CCI
Rejection &
Digital AGC
Carrier
Offset
Timing
Offset
Viterbi Decoder,
Byte Deinterleaver,
RS Decoder,
Energy Dispersal
Transport
Stream
Smoothing
Buffer
TESTMODE
TUNERCLK
Time, Frequency and Symbol
Synchronization
IF to Baseband Conversion
DC Offset Correction
I/Q Phase Offset Correction
RF_IFAGC_Q
Auto
Recovery
Acquisition
Controller
AINM_I
AINP_Q
AINM_Q
OSCEN
OSC, PLL &
Clock
Generator
ADC & Logic Clocks
BER
Measurement
Data
20.48MHz Crystal
or 4 to 20MHz Tuner
Crystal Reference Input
ZIF Enable
Impulse
Noise
Canceller
TSDATA[7:0]
TSVALID
TSCLK
TSSYNC
TSERR
CXD1968AR
4
3
7
10
9
8
7
8
9
0
Vorabversion
Preliminary Version
